RT6248B
Most applications never experience instantaneous full load
steps and the IC's high switching frequency and fast
transient response can easily control voltage regulation
at all times. Therefore, sag and soar are seldom an issue
except in very low-voltage CPU core or DDR memory
supply applications, particularly for devices with high clock
frequencies and quick changes into and out of sleep
modes. In such applications, simply increasing the amount
of ceramic output capacitor (sag and soar are directly
proportional to capacitance) or adding extra bulk
capacitance can easily eliminate any excessive voltage
transients.
resistance, θJA. The derating curves in Figure 2 allows
the designer to see the effect of rising ambient temperature
on the maximum power dissipation.
3.0
Four-Layer PCB
2.5
2.0
1.5
1.0
0.5
0.0
In any application with large quick transients, it should
calculate soar and sag to make sure that over-voltage
protection and under-voltage protection will not be triggered.
0
25
50
75
100
125
Ambient Temperature (°C)
Thermal Considerations
Figure 2. Derating Curve of Maximum PowerDissipation
The junction temperature should never exceed the
absolute maximum junction temperature TJ(MAX), listed
under Absolute Maximum Ratings, to avoid permanent
damage to the device. The maximum allowable power
dissipation depends on the thermal resistance of the IC
package, the PCB layout, the rate of surrounding airflow,
and the difference between the junction and ambient
temperatures. The maximum power dissipation can be
calculated using the following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction-to-ambient
thermal resistance.
For continuous operation, the maximum operating junction
temperature indicated under Recommended Operating
Conditions is 125°C. The junction-to-ambient thermal
resistance, θJA, is highly package dependent. For a UQFN-
12HL 3x3 (FC) package, the thermal resistance, θJA, is
40°C/W on a standard JEDEC 51-7 high effective-thermal-
conductivity four-layer test board. The maximum power
dissipation at TA = 25°C can be calculated as below :
PD(MAX) = (125°C − 25°C) / (40°C/W) = 2.5W for a
UQFN-12HL 3x3 (FC) package.
The maximum power dissipation depends on the operating
ambient temperature for the fixed TJ(MAX) and the thermal
Copyright 2018 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
14
DS6248B-01 May 2018
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
