RT6219
Marking Information
RT6219AGQW
6K= : Product Code
RT6219AHGQW
7S= : Product Code
YMDNN : Date Code
6K=YM
DNN
7S=YM
DNN
YMDNN : Date Code
RT6219BLGQW
7Q= : Product Code
RT6219BHGQW
7R= : Product Code
YMDNN : Date Code
7Q=YM
DNN
7R=YM
DNN
YMDNN : Date Code
Pin Configuration
(TOP VIEW)
PGOOD
VBYP
VIN
EN
FB
PGND
1
2
3
4
5
10
9
8
7
6
11
SW
SW
SW
BOOT
VCC
WDFN-10L 3x3
Functional Pin Description
Pin No.
1
2
3
4
5
6
Pin Name
PGOOD
VBYP
VIN
EN
FB
VCC
Pin Function
Open-drain power good indicator output.
Switch over input supply voltage for VCC. A low pass filter should be connected
to AGND, if VBYP is applied. If VBYP is not used, then connect to AGND. Do not
connect to VCC pin.
Power input connect to high-side MOSFET drain.
Enable control input. Do not leave this pin floating. The slew rate of EN is
recommended to be slower than 4.8V/s.
Feedback voltage input.
5V linear regulator output for internal control circuit. Bypass V
CC
to AGND with a
2.2F capacitor. V
CC
can only supply internal circuits. Do not connect to external
loads.
Bootstrap supply for high-side gate driver. A capacitor is needed to drive the
power switch's gate above the supply voltage. It is connected between the SW
and BOOT pins to form a floating supply across the power switch driver.
Switch node.
Power ground. The exposed pad must be soldered to a large PCB and connected
to GND for maximum power dissipation.
7
8, 9, 10
11
(Exposed Pad)
BOOT
SW
PGND
Copyright
©
2018 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
2
DS6219-06 January 2018
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
