RT6207A/B
Output Voltage Setting
External BOOT Capacitor Series Resistance
Set the desired output voltage using a resistive divider
from the output to ground with the midpoint connected to
FB. The output voltage is set according to the following
equation :
The internal power MOSFET switch gate driver is
optimized to turn the switch on fast enough for low power
loss and good efficiency, but also slow enough to reduce
EMI. Switch turn-on is when most EMI occurs since VSW
rises rapidly. During switch turn-off, SW is discharged
relatively slowly by the inductor current during the dead
time between high-side and low-side switch on-times. In
some cases it is desirable to reduce EMI further, at the
expense of some additional power dissipation. The switch
turn-on can be slowed by placing a small (<47Ω)
resistance between BOOT and the external bootstrap
capacitor. This will slow the high-side switch turn-on and
VSW's rise. To remove the resistor from the capacitor
charging path (avoiding poor enhancement due to
undercharging the BOOT capacitor), use the external diode
shown in Figure 6 to charge the BOOT capacitor and place
the resistance between BOOT and the capacitor/diode
connection.
VOUT = 0.7V x (1 + R1 / R2)
V
OUT
R1
FB
RT6207A/B
R2
GND
Figure 5. Output Voltage Setting
Place the FB resistors within 5mm of the FB pin. Choose
R2 between 10kΩ and 100kΩ to minimize power
consumption without excessive noise pick-up and
calculate R1 as follows :
PVCC Capacitor Selection
R2(V
V
REF
)
OUT
REF
R1
V
Decouple PVCC to GND with a 1μF ceramic capacitor.
High grade dielectric (X7R, or X5R) ceramic capacitors
are recommended for their stable temperature and bias
voltage characteristics.
For output voltage accuracy, use divider resistors with 1%
or better tolerance.
External BOOT Bootstrap Diode
When the input voltage is lower than 5.5V it is
recommended to add an external bootstrap diode between
VIN(or VINR) and the BOOT pin to improve enhancement
of the internal MOSFET switch and improve efficiency.
The bootstrap diode can be a low cost one such as 1N4148
or BAT54.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
5V
PD(MAX) = (TJ(MAX) − TA) / θJA
BOOT
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
RT6207A/B
SW
0.1µF
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
UQFN-13JL 2x3 (FC) package, the thermal resistance,
θJA, is 64.8°C/W on a standard four-layer thermal test
Figure 6. External Bootstrap Diode
Copyright 2015 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS6207A/B-02 December 2015
www.richtek.com
19
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