RT6154A/B
If the RT6154A/B operates in Buck mode, the worst-case
voltage ripple occurs at the highest input voltage. When
the RT6154A/B operates in Boost mode, the worst-case
voltage ripple occurs at the lowest input voltage.
The maximum power dissipation depends on the operating
ambient temperature for fixed TJ(MAX) and thermal
resistance, θJA. The derating curve in Figure 1 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
The maximum voltage of overshoot or undershoot, is
inversely proportional to the value of the output capacitor.
To ensure stability and excellent transient response, it is
recommended to use a minimum of 100μF X7R capacitors
at the output. For surface mount applications, Taiyo Yuden
or TDK ceramic capacitors, X7R series Multi-layer Ceramic
Capacitor is recommended.
4.0
Four-Layer PCB
3.6
3.2
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0.0
A capacitor with a value in the range of the calculated
minimum should be used. This is required to maintain
control loop stability. There are no additional requirements
regarding minimum ESR. Low ESR capacitors should be
used to minimize output voltage ripple. Larger capacitors
will cause lower output voltage ripple as well as lower
output voltage drop during load transients.
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 1. Derating Curve of Maximum PowerDissipation
Thermal Considerations
Layout Consideration
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
For the best performance, the following PCB Layout
guidelines must be strictly followed.
Place the input and output capacitors as close as
possible to the input and output pins.
Keep the main power traces as wide and short as
possible.
P
D(MAX) = (TJ(MAX) − TA) / θJA
Connect theGNDand Exposed Pad to a strong ground
plane for maximum thermal dissipation and noise
protection.
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
Switch node experiences high frequency voltage swings
and should be kept in a small area. Keep analog
components away from the switch node to prevent stray
capacitive noise pick-up.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
WDFN-14AL 4x3 package, the thermal resistance, θJA, is
28.6°C/W on a standard JEDEC 51-7 four-layer thermal
test board. The maximum power dissipation at TA = 25°C
can be calculated by the following formula :
PD(MAX) = (125°C − 25°C) / (28.6°C/W) = 3.49W for
WDFN-14AL 4x3 package
Copyright 2017 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS6154A/B-03 May 2017
www.richtek.com
13
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