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RT5800 参数 Datasheet PDF下载

RT5800图片预览
型号: RT5800
PDF下载: 下载PDF文件 查看货源
内容描述: [暂无描述]
分类和应用:
文件页数/大小: 47 页 / 2664 K
品牌: RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
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RT5800
Functional Pin Description
Pin No.
1
2, 6, 17, 21
3
4, 19
5
7
8
9
10
11
12
13
14
15
Pin Name
PVIN4
NC
LX4
PGND
LX1
PVIN1
VSELA
AVIN_FILT
RTN1
VOUT1
RTN3
VOUT3
AGND
WDOG_RST
Pin Function
Power input for power stage 4. It is recommended to use a 10F, X7R
capacitor.
No internal connection.
Switching node for power stage 4.
Power ground for power stage.
Switching node for power stage 1.
Power input for power stage 1. It is recommended to use a 10F, X7R
capacitor.
VSEL input pin for all channels. Using corresponding register to define
action. "Do Not" leave this pin floating.
Filtered analog supply voltage. It is recommended to use a 1F, X7R
capacitor.
Remote ground sense for Buck1.
Output voltage sense for Buck1.
Remote ground sense for Buck3.
Output voltage sense for Buck3.
Analog GND.
Digital input. Reset all Bucks to default output voltage and some relative
registers to default settings when this pin is pulled low. Connect this pin to
VIO pin if this pin is not used. "Do Not" leave this pin floating.
Power input for power stage 3. It is recommended to use a 10F, X7R
capacitor.
Switching node for power stage 3.
Switching node for power stage 2.
Power input for power stage 2. It is recommended to use a 10F, X7R
capacitor.
I
2
C clock. "Do Not" leave this pin floating.
I
2
C data. "Do Not" leave this pin floating.
Interrupt indicator. When INT function is used, set 0x33[6] = 1, 0x34[6] = 1
and 0x35[6] = 1.
I/O supply voltage for digital communications. Connect this pin to 1.8V. "Do
Not" leave this pin floating.
Master chip enable. A logic-high enables the converter; a logic-low forces
the device into shutdown mode. "Do Not" leave this pin floating.
Output voltage sense for Buck2.
Remote ground sense for Buck2.
Analog input voltage.
Exposed pad. The exposed pad is connected to PGND and must be
soldered to a large PCB copper area for maximum power dissipation.
16
18
20
22
23
24
25
26
27
28
29
30
PVIN3
LX3
LX2
PVIN2
SCL
SDA
INT
VIO
EN
VOUT2
RTN2
AVIN
31(Exposed PAD) PGND
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS5800-00
November 2019
www.richtek.com
3