RT5768A
Thermal Considerations
Layout Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
Layout is very important in high frequency switching
converter design. The PCB can radiate excessive noise
and contribute to converter instability with improper layout.
Certain points must be considered before starting a layout
using the RT5768A.
Make the traces of the main current paths as short and
wide as possible.
PD(MAX) = (TJ(MAX) − TA) / θJA
Put the input capacitor as close as possible to the device
where TJ(MAX) is the maximum junction temperature, TAis
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
pins (VIN andGND).
LX node encounters high frequency voltage swings so it
should be kept in a small area. Keep sensitive
components away from the LX node to prevent stray
capacitive noise pick-up.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
WDFN-10L 3x3 packages, the thermal resistance, θJA, is
70°C/W on a standard JEDEC 51-7 four-layer thermal test
board. The maximum power dissipation at TA = 25°C can
be calculated by the following formulas :
Ensure all feedback network connections are short and
direct. Place the feedback network as close to the chip
as possible.
TheGNDpin and Exposed Pad should be connected to
a strong ground plane for heat sinking and noise
protection.
PD(MAX) = (125°C − 25°C) / (70°C/W) = 1.429W for
WDFN-10L 3x3 package
An example of PCB layout guide is shown in Figure 3.
The maximum power dissipation depends on the operating
ambient temperature for fixed TJ(MAX) and thermal
resistance, θJA. The derating curves in Figure 2 allow the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
for reference.
Input capacitor must be placed
as close to the IC as possible.
The output capacitor must
be placed near the IC.
GND
C
OUT
C
IN1
2.0
1
2
3
4
5
10
9
PVIN
PVIN
SVIN
NC
LX
LX
LX
Four-Layer PCB
V
OUT
C
IN2
8
R
PGOOD
R2
7
PGOOD
1.6
1.2
0.8
0.4
0.0
V
11
6
IN
EN
FB
R
R1
EN
LX should be connected to
inductor by wide and short trace.
Keep sensitive components
away from this trace.
The voltage divider must
be connected as close to
the device as possible.
Figure 3. PCB Layout Guide
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 2. Derating Curve of Maximum PowerDissipation
Copyright 2019 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS5768A-02 June 2019
www.richtek.com
11
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