RT5701
Parameter
Set-Up Time for a Repeated
START Condition
Data Hold Time
Data Set-Up Time
Set-Up Time for STOP
Condition
Bus Free Time between a
STOP and START Condition
Rising Time of both SDA and
SCL Signals
Falling Time of both SDA and
SCL Signals
Symbol
t
SU;STA
t
HD;DAT
t
SU;DAT
t
SU;STO
t
BUF
t
r
t
f
SDA or SCL Voltage = 0.4V
Test Conditions
Min
0.6
0
100
0.6
1.3
20
20
2
Typ
--
--
--
--
--
--
--
--
Max
--
0.9
--
--
--
300
300
--
Unit
μs
μs
ns
μs
μs
ns
ns
mA
SDA and SCL Output Low Sink
I
OL
Current
Note 1.
Stresses beyond those listed
“Absolute
Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2.
θ
JA
is measured at T
A
= 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7.
θ
JC
is
measured at the exposed pad of the package.
Note 3.
Devices are ESD sensitive. Handling precaution is recommended.
Note 4.
The device is not guaranteed to function outside its operating conditions.
Copyright
©
2018 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS5701-02 March 2018
www.richtek.com
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