RT5035A/B
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SHDN_ SHDN_
Meaning Reserved Reserved Reserved Reserved Reserved Reserved
PFM1
0
PFM10
0
Default
0
0
0
0
0
0
A13
0X0D
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
B
B
B
B
B
B
B
B
0 : CH1 is off when EN is low (Part. A default)
1 : CH1 operates at PFM when EN is low (Part. B default)
SHDN_PFM1
SHDN_PFM10
0 : CH10 is off when EN is low
1 : CH 10 operates at PFM when EN is low
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning
Default
PWM1 ENSW4
EN4
1
EN5
0
EN6
0
EN7
0
EN8
0
PWM10
1
1
0
A14
0X0E
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
A
A
A
A
A
A
A
A
1 : Means CH1 in Peak-Current Control PWM synchronous rectified operation
mode.
PWM1
0 : Means CH1 in PFM asynchronous rectified operation mode.
1 : Enable SW4.
0 : Disable SW4
ENSW4
EN4
1 : Enable CH4
0 : Disable CH4
1 : Enable CH5
0 : Disable CH5
EN5
1 : Enable CH6
0 : Disable CH6
EN6
1 : Enable CH7
0 : Disable CH7
EN7
1 : Enable CH8
0 : Disable CH8
EN8
1 : Means CH10 in Peak-Current Control PWM synchronous rectified operation
PWM10
mode.
0 : Means CH10 in PFM mode
Notes :
ENSW4, EN4/5/6/7/8 at A14 : enable (ENx = 1) or disable (ENx = 0) SW4/CH4/5/6/7/8
When EN pin goes high, CHx would turn on (after the delay time ENDLYx) if the bits ENx = 1.
The register byte A14 would be reset when the external EN input pin goes low.
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32
DS5035A/B-03 February 2020
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
