RT5028
Parameter
LDO1 to LDO8
Input Voltage for
VINL123/456/78
Output Voltage LDO123/78
Output Voltage LDO456
Output Current
Output Short Current
Voltage Difference
Output Voltage Temperature
Coefficient
Supply Current
Shutdown Current
Line Regulation
Load Regulation
Transient Response
Ripple Rejection
Rising Time
Falling Time
I C Interface Electrical Characteristics
Voltage Output Low
High-Lev el
Input Voltage
SCL Clock
Low-Level
V
OL
V
IH
V
IL
SCL
--
1.5
--
--
--
--
--
--
0.4
--
0.4
400
V
kHz
V
2
Symbol
Test Conditions
Min
Typ
Max
Unit
V
INL
V
OUTL
V
OUTL
I
OUT
Isht
V
IN
−
V
OUT
V
IN
> 3.1V
V
IN
> 2.5V
V
IN
= V
SET
, I
OUT
= I
OUTMAX
3.1V
≤
V
IN
≤
5.5V, 50μA
≤
I
OUT
≤
I
MAX
3.1V
≤
V
IN
≤
5.5V, 50μA
≤
I
OUT
≤
I
MAX
2.5
−3%
−3%
300
330
0.05
0.05
--
--
1.6 to
3.6
3 to
3.6
--
450
0.1
0.11
±100
35
1
1
0.1
50
60
220
600
5.5
3%
3%
--
600
0.3
0.5
--
60
2
5
1
--
--
300
1000
V
V
V
mA
mA
V
ppm/°C
μA
μA
mV
%
mV
dB
μs
μs
I
SS
I
OFF
I
OUT
= 0mA
10
0
Input 3V to 5V, load = 100mA
V
IN
= 5V, Load 100mA to 300mA
ΔV
OUT
50μA
↔
I
OUTMAX
/ 2 (⊿t = 1μs)
f = 10kHz, I
OUT
= I
OUTMAX
/ 2
V
OUT
≥
0.7 x V
Target
, I
OUT
= 0mA
V
OUT
≤
0.3 x V
Target
, I
OUT
= 0mA
0
0
--
--
150
300
Note 1.
Stresses beyond those listed
“Absolute
Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2.
θ
JA
is measured at T
A
= 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7.
θ
JC
is
measured at the exposed pad of the package.
Note 3.
Devices are ESD sensitive. Handling precaution is recommended.
Note 4.
The device is not guaranteed to function outside its operating conditions.
Copyright
©
2016 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
8
DS5028-02
September 2016