RT4813
Pin Configuration
(TOP VIEW)
SCL
EN
VOUT
SW
PGND
1
2
3
4
9
8
7
6
5
VIN
FB
GND
SDA
UQFN-9L 2x2 (FC)
Functional Pin Description
Pin No.
1
2
3
4
5
6
7
8
9
Pin Name
EN
VOUT
SW
PGND
SDA
GND
FB
VIN
SCL
Pin Function
Enable input (1 enabled, 0 disabled), must not be left floating.
Boost converter output.
Switching node.
Power ground.
I
2
C interface data input.
Analog ground.
Voltage feedback.
Power input. Input capacitor CIN must be placed as close to IC as possible.
I
2
C interface clock input.
Functional Block Diagram
VIN
Gate
DRV
VOUT
OCP
SW
SDA
SCL
EN
Digital
CTRL
PWM
CTRL
AMP
-
+
FB
OSC
PGND
OTP
UVLO
VREF
GND
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
2
DS4813-09
August 2019
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
