RT4532
Thermal Considerations
Layout Consideration
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
As for all switching power supplies, the layout is an
important step in the design, especially at high peak
currents and switching frequencies. If the layout is not
carefully done, the regulator might expose noise problems
and duty cycle jitter. Therefore, use wide and short traces
for high current paths. The input capacitor should be placed
as close as possible to the input pin for good input voltage
filtering. The inductor should be placed as close as possible
to the switch pin to minimize the noise coupling into other
circuits. The output capacitor needs to be placed directly
from the VOUT pin to GND rather than across the LEDs.
This reduces the ripple current in the trace to the LEDs.
When doing the PCB layout, the bold traces should be
routed first, as well as placement of the inductor, and input
and output capacitors.
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
WL-CSP-10B 0.87x2.07 (BSC) package, the thermal
resistance, θJA, is 99.6°C/W on a standard JEDEC 51-7
four-layer thermal test board. The maximum power
dissipation at TA = 25°C can be calculated by the following
formula :
PD(MAX) = (125°C − 25°C) / (99.6°C/W) = 1W for
WL-CSP-10B 0.87x2.07 (BSC) package
The maximum power dissipation depends on the operating
ambient temperature for fixed TJ(MAX) and thermal
resistance, θJA. The derating curve in Figure 1 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
1.2
Four-Layer PCB
1.0
0.8
0.6
0.4
0.2
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 1. Derating Curve of Maximum PowerDissipation
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is a registered trademark of Richtek Technology Corporation.
DS4532-01 August 2015
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