RT3667BY
Pin No.
17
18
Pin Name
IMONA
VDDIO
Pin Function
Current monitor output for the VDDNB controller. This pin outputs a
voltage proportional to the output current.
Processor memory interface power rail and serves as the reference for
PWROK, SVD, SVC and SVT. This pin is used by the VR to reference the
SVI pins.
System power good input. If PWROK is low, the SVI interface is disabled
and VR returns to BOOT-VID state with initial load line slope and initial
offset. If PWROK is high, the SVI interface is running and the DAC
decodes the received serial VID codes to determine the output voltage.
Serial VID clock input from processor.
Serial VID data input from processor. This pin is a serial data line.
Serial VID telemetry input from VR. This pin is a push-pull output.
Over clocking offset setting for the VDD controller.
Over clocking special purpose offset setting for the VDDNB controller.
1st platform setting. Platform can use this pin to set OCP_TDC threshold,
DVID compensation bit1 and internal ramp slew rate.
2st platform setting. Platform can use this pin to set quick response
threshold, OCP_TDC trigger delay time, DVID compensation bit0, and
over clocking offset enable setting.
Over current indicator for dual OCP mechanism. This pin is an open drain
output.
Controller power supply input. Connect this pin to 5V with an 1F or
greater ceramic capacitor for decoupling.
Internal bias current setting. Connect only a 100k resistor from this pin
to GND to generate bias current for internal circuit. Place this resistor as
close to IBIAS pin as possible.
Compensation node output of the VDDNB controller.
Output voltage feedback input of VDDNB controller. This pin is the
negative input of the error amplifier for the VDDNB controller.
VDDNB controller voltage sense input. This pin is connected to the
terminal of VDDNB controller output voltage.
Positive current sense input of Channel 1 and 2 for VDDNB controller.
Negative current sense input of Channel 1 and 2 for VDDNB controller.
Controller enable control input. A logic high signal enables the controller.
Power good indicator for the VDDNB controller. This pin is an open-drain
output.
Power good indicator for the VDD controller. This pin is an open-drain
output.
VDDNB controller on-time setting. Connect this pin to the converter input
voltage, Vin, through a resistor, RTONNB, to set the on-time of
UGATE_VDDNB and also the output voltage ripple of VDDNB controller.
PWM output for Channel 1 and 2 of VDDNB controller.
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33, 36
34, 35
37
38
39
40
41, 42
PWROK
SVC
SVD
SVT
OFS
OFSA
SET1
SET2
OCP_L
VCC
IBIAS
COMPA
FBA
VSENA
ISENA2P, SENA1P
ISENA2N,ISENA1N
EN
PGOODA
PGOOD
TONSETA
PWMA2, PWMA1
Copyright
©
2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS3667BY-00
September 2019
www.richtek.com
3
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
