RT3667BY
Table 4. SET2 Pin Setting for VDD Controller QR threshold, DVID Compensation
and OCP Trigger Delay
SET2 Pin Voltage
QRTH
(for VDD)
DVID Compensation
OCPTRGDELAY
(for VDD/VDDNB)
Before Current Injection V
(mV)
[0]
SET2
19
72
10ms
40ms
10ms
40ms
10ms
40ms
10ms
40ms
10ms
40ms
10ms
40ms
10ms
40ms
10ms
40ms
10ms
40ms
10ms
40ms
10ms
40ms
10ms
40ms
10ms
40ms
10ms
40ms
10ms
40ms
10ms
40ms
Disable
39mV
47mV
55mV
Disable
39mV
47mV
55mV
0
122
172
222
272
0
0
0
1
1
1
1
323
373
423
473
523
573
623
673
723
773
823
874
924
974
1024
1074
1124
1174
1224
1274
1324
1375
1425
1475
1525
1575
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10
DS3667BY-00 September 2019
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
