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RT3605BE 参数 Datasheet PDF下载

RT3605BE图片预览
型号: RT3605BE
PDF下载: 下载PDF文件 查看货源
内容描述: [暂无描述]
分类和应用:
文件页数/大小: 53 页 / 769 K
品牌: RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
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RT3605BE
SVID Interface/Control Logic/Configuration
Registers
SVID Interface receives or transmits SVID signal with CPU.
Control Logic executes command (Read/Write registers,
setVID, setPS) and sends related signals to control VR.
Configuration Registers include function setting registers
and CPU required registers.
IMON Filter
IMON Filter is used to average current signal by analog
low-pass filter. It outputs IMON
AVG
to the MUX of ADC for
current reporting.
MUX and ADC
The MUX supports the inputs of SET1, SET2, SET3, SET4,
SET5, TSEN_MAIN, TSEN_AUXI, PSYS, IMON
AVG_MAIN
,
IMON
AVG_AUXI
, and IMON
AVG_SA
. The ADC converts these
analog signals to digital codes for reporting or function
settings.
UVLO
The UVLO detects the VCC voltage. As VCC exceeds
threshold, controller issues POR = high and waits VRON.
After both POR and VRON are ready, then controller is
enabled.
Loop Control/Protection Logic
It controls power-on/off sequence, protections, power state
transition, and PWM sequence.
DAC
The DAC generates a reference VID voltage according to
the VID code sent by Control Logic. According to setVID
command, Control Logic dynamically changes VID voltage
to target with required slew rate.
ERROR AMP
The ERROR AMP inverts and amplifies the difference
between output voltage and VID with externally setting
finite DC gain. The output signal is COMP for PWM trigger.
Zero Current Detection
Detect whether each phase current cross zero current.
The result is used for DEM power saving and overshoot
reduction (Anti-overshoot Function).
AQR/ANTIOVS
The AQR is a new generation of quick response
mechanism (Adaptive Quick Response, AQR) which
detects loading rising edge and allows all PWM to turn
on. The PWM pulse width triggered by AQR is adaptive to
loading level. The AQR trigger level can be set by PIN-
SETTING. ANTIOVS can help overshoot reduction which
detects loading falling edge and forces all PWM in tri-
state until the zero current is detected.
is a registered trademark of Richtek Technology Corporation.
PER CSGM
The PER CSGM senses per-phase inductor current. The
outputs are used for loop response, Current Balance, Zero
Current Detection, current reporting and over-current
protection.
SUM CSGM
The SUM CSGM senses total inductor current with RIMON
gain adjustment. SUM CSGM output current ratio can
also be set by PIN-SETTING(Ai[1:0]). It helps wider
application range of DCR and load line. SUM CSGM output
is used for PWM trigger.
RAMP
The RAMP helps loop stability and transient response.
PWM CMP
The PWM comparator compares COMP signal and sum
current signal based on RAMP to trigger PWM.
Offset Cancellation
The offset cancellation is based on VID, COMP voltage
and current signal from SUM CSGM to control output
voltage accuracy.
Current Balance
Per-phase current sense signal is compared with sensed
average current. The comparison result will adjust each
phase PWM width to optimize current and thermal
balance.
Copyright
©
2019 Richtek Technology Corporation. All rights reserved.
www.richtek.com
8
DS3605BE-00
December 2019