RT2862A
Application Information
Output Voltage Setting
Chip Enable Operation
The resistive divider allows the FB pin to sense the output
voltage as shown in Figure 1.
The EN pin is the chip enable input. Pulling the EN pin
low (<0.4V) will shutdown the device. During shutdown
mode, the RT2862A quiescent current drops to lower than
3µA. Driving the EN pin high (>2.5V, <3.3V) will turn on
the device again. For external timing control, the EN pin
can also be externally pulled high by adding a REN resistor
and CEN capacitor from the VIN pin (see Figure 3).
V
OUT
R1
FB
RT2862A
GND
R2
REN must be chose between 150kΩ to 600kΩ, which is
to avoid huge leak current into chip.
Figure 1. Output Voltage Setting
EN
R
EN
V
EN
RT2862A
IN
The output voltage is set by an external resistive voltage
divider according to the following equation :
C
EN
GND
R1
R2
VOUT = VREF 1+
Figure 3. Enable Timing Control
where VREF is the reference voltage (0.8V typ.).
An external MOSFET can be added to implement digital
control on the EN pin when no system voltage above 2.5V
is available, as shown in Figure 4. In this case, a 300kΩ
pull-up resistor, REN, is connected between VIN and the
EN pin. MOSFET Q1 will be under logic control to pull
down the EN pin.
External Bootstrap Diode
Connect a 0.1µF low ESR ceramic capacitor between the
BOOT and SW pins. This capacitor provides the gate driver
voltage for the high-side MOSFET.
It is recommended to add an external bootstrap diode
between an external 5V and BOOT pin for efficiency
improvement when input voltage is lower than 5.5V or duty
ratio is higher than 65% .The bootstrap diode can be a
low cost one such as IN4148 or BAT54. The external 5V
can be a 5V fixed input from system or a 5V output of the
RT2862A. Note that the external boot voltage must be
lower than 5.5V
R
EN
300k
V
EN
RT2862A
GND
IN
Q1
EN
Figure 4. Digital Enable Control Circuit
Under-Voltage Protection
5V
Hiccup Mode
BOOT
The RT2862A provides Hiccup Mode Under-Voltage
Protection (UVP). When the VFB voltage drops below 0.4V,
the UVP function will be triggered to shut down switching
operation. If the UVP condition remains for a period, the
RT2862Awill retry automatically. When the UVP condition
is removed, the converter will resume operation. The UVP
is disabled during soft-start period.
100nF
RT2862A
SW
Figure 2. External Bootstrap Diode
Copyright 2018 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
www.richtek.com
10
DS2862A-02 January 2018
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
