RT2810A/B
VRIPPLE = VRIPPLE(ESR) VRIPPLE(C)
Soft-Start (SS)
The RT2810A/B soft-start uses an external capacitor at
SS to adjust the soft-start timing according to the following
equation :
VRIPPLE(ESR) = IL RESR
I
L
V
=
RIPPLE(C)
8C
f
SW
OUT
CSS nF 0.7
t ms
Feed-forward Capacitor (Cff)
ISS μA
The RT2810A/B are optimized for ceramic output
capacitors and for low duty cycle applications. However
for high-output voltages, with high feedback attenuation,
the circuit's response becomes over-damped and transient
response can be slowed. In high-output voltage circuits
(VOUT > 3.3V) transient response is improved by adding a
small “feed-forward” capacitor (Cff) across the upper FB
divider resistor (Figure 1), to increase the circuit's Q and
reduce damping to speed up the transient response without
affecting the steady-state stability of the circuit. Choose
a suitable capacitor value that following below step.
Following below equation to get the minimum capacitance
range in order to avoid UV occur.
C
(I
LIM
V
0.61.2
OUT
OUT
T
Load Current)0.8
T6μA
V
REF
C
SS
Do not leave SS unconnected.
Enable Operation (EN)
For automatic start-up, the low-voltage EN pin must be
connected to VIN with a 100kΩ resistor. EN can be
externally pulled to VIN by adding a resistor-capacitor
delay (REN and CEN in Figure 2). Calculate the delay time
using EN's internal threshold where switching operation
begins (1.2V, typical).
Get the BW the quickest method to do transient
response form no load to full load. Confirm the damping
frequency. The damping frequency is BW.
An external MOSFET can be added to implement digital
control of EN (Figure 3). In this case, a 100kΩ pull-up
resistor, REN, is connected between VIN and the EN pin.
MOSFET Q1 will be under logic control to pull down the
EN pin. To prevent enabling circuit when VIN is smaller
than the VOUT target value or some other desired voltage
level, a resistive voltage divider can be placed between
the input voltage and ground and connected to ENto create
an additional input under voltage lockout threshold (Figure
4).
BW
V
OUT
R1
C
ff
EN
FB
RT2810A/B
R
EN
V
EN
RT2810A/B
IN
R2
C
GND
EN
GND
Figure 1. Cff Capacitor Setting
Figure 2. External Timing Control
Cff can be calculated base on below equation :
1
Cff
23.1412R1BW 0.8
Copyright 2016 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
12
DS2810A/B-06 November 2016
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
