RT2702
Audio Skipping Mode (ASM)
the PWM for operation. Once the input voltage decreases
by approximately 500mV, the VIN under voltage-lockout
(UVLO) circuitry will disable the external driver by setting
DISB low.
The RT2702 activates a unique type of diode emulation
mode with switching frequency of 30kHz, called audio
skipping mode. This mode eliminates audio-frequency
modulation that would otherwise be present when a lightly
loaded controller automatically skips pulses. In audio
skipping mode, if the PWM switching frequency is lower
than 30kHz, controller will force PWM go low to turn on
low-side switch of DrMOS. When FB is discharged to
VREF, then a regular PWM pair is generated. Thus, the
sequence of PWM signal would be HiZ-state, low-state,
high-state, low-state, and back to HiZ-state.
Enable and Disable
EN controls the power-up sequencing of the linear regulator
(VDRV) and buck controller. The RT2702 remains in
shutdown if the EN pin is lower than 0.8V. When EN pin
rises above the 1.05V, the RT2702 will begin a new
initialization and soft-start procedure.
Linear Regulator (VDRV)
The RT2702 contains a 5V (VDRV) linear regulator, which
can afford at least 100mA loading. This regulator will be
turned on only when VIN rises above POR threshold 4.5V
and EN is higher than 1.2V.
Forced-CCM Mode (FCCM)
The low noise, forced-CCM mode disables the zero-
crossing comparator, which means PWM signal won’t
have HiZ-state anymore unless negative over current
protection is toggled. This causes the inductor current to
reverse at light loads as the PWM loop needs to maintain
a duty ratio VOUT/VIN. The benefit of forced-CCM mode is
to keep the switching frequency fairly constant.
External Driver Enable (DISB)
The RT2702 provides an output pin DISB to turn on/off
external DrMOS. When the linear regulator VDRV soft-
start is finished, DISB will be pulled high to 5V. Then the
RT2702 begins the soft-start procedure. In addition, if UVP
or OTP occurs, DISB will be pulled low to disableDrMOS
until the protections are clean.
Power-On Reset (POR) and UVLO
Power-on reset (POR) occurs when VIN rises above to
approximately 4.5V (maximum), the RT2702 will prepare
V
IN
V
ext
.> V
V
Int.
ext.< VInt.
EN
……
……
V
FB
1.2V
1.2V
1.2V
0.6V
Int. SS
……
……
……
0V
0V
0V
1.2V
1.2V
1.2V
Ext. SS
……
……
0.6V
0.6V
0V
Int. SSOK
Ext. SSOK
PWM
……
……
……
……
……
……
POK
t
t
t
SS_VDRV
SS_VDRV
SS_VDRV
POR
Soft-Start_Int
Region 1
Soft-Start_Ext
Region 2
Soft-Start_Int+Ext
Region 3
Figure 2. Soft-Start Sequence
Copyright 2018 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS2702-02 May 2019
www.richtek.com
13
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