RT2528
Fault Flag
should have a low dissipation factor to allow decoupling
at higher frequencies.
The RT2528 provides a FAULT signal pin which is an
N-Channel open drain MOSFET output. This open drain
output goes low when current exceeds current limit
threshold. The FAULT output is capable of sinking a 1mA
load to typically 180mV above ground. The FAULT pin
requires a pull-up resistor ; this resistor should be large
in value to reduce energy drain. A100kΩ pull-up resistor
works well for most applications. In case of an over current
condition, FAULT will be asserted only after the flag
response delay time, tD, has elapsed. This ensures that
FAULT is asserted upon valid over current conditions and
that erroneous error reporting is eliminated. For example,
false over current conditions may occur during hot-plug
events when extremely large capacitive loads are
connected, which induces a high transient inrush current
that exceeds the current limit threshold. The FAULT
response delay time, tD, is typically 7.5ms.
Chip Enable Input
The RT2528 don’t have auto discharge function. During
shutdown condition, the supply current is 1μA typical.
The maximum guaranteed voltage for a logic-low at the
EN pin is 0.4V. A minimum guaranteed voltage of 1.2V at
the EN pin will turn on the RT2528. Floating the input
may cause unpredictable operation.
Under Voltage Lockout
Under Voltage Lockout (UVLO) prevents the MOSFET
switch from turning on until input voltage exceeds
approximately 2.2V. If input voltage drops below
approximately 2V, UVLO turns off the MOSFET switch
and FAULT will be asserted accordingly. The under voltage
lockout detection functions only when the switch is
enabled.
Supply Filter/Bypass Capacitor
Thermal Considerations
A 10μF low-ESR ceramic capacitor connected from VIN
to GND and located close to the device is strongly
recommended to prevent input voltage drooping during
hotplug events. However, higher capacitor values may be
used to further reduce the voltage droop on the input.
Without this bypass capacitor, an output short may cause
sufficient ringing on the input (from source lead inductance)
to destroy the internal control circuitry. Note that the input
transient voltage must never exceed 6V as stated in the
Absolute Maximum Ratings.
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
Output Filter Capacitor
A low-ESR 22μF ceramic capacitor connected between
VOUT and GND is strongly recommended to meet the
USB standard maximum droop requirement for the hub,
VBUS. Standard bypass methods should be used to
minimize inductance and resistance between the bypass
capacitor and the downstream connector to reduce EMI
and decouple voltage droop caused by hot-insertion
transients in downstream cables. Ferrite beads in series
with VBUS, the ground line and the 0.1μF bypass
capacitors at the power connector pins are recommended
for EMI and ESD protection. The bypass capacitor itself
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
SOP-8 (Exposed Pad) package, the thermal resistance,
θJA, is 49°C/W on a standard JEDEC 51-7 four-layer
thermal test board. The maximum power dissipation at
TA = 25°C can be calculated by the following formula :
PD(MAX) = (125°C − 25°C) / (49°C/W) = 2.041W for
SOP-8 (Exposed Pad) package
Copyright 2013 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
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10
DS2528-03 November 2013
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
