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RT2101B 参数 Datasheet PDF下载

RT2101B图片预览
型号: RT2101B
PDF下载: 下载PDF文件 查看货源
内容描述: [暂无描述]
分类和应用:
文件页数/大小: 13 页 / 225 K
品牌: RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
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RT2101B  
3.6  
3.2  
2.8  
2.4  
2.0  
1.6  
1.2  
0.8  
0.4  
0.0  
Thermal Considerations  
Four-Layer PCB  
For continuous operation, do not exceed absolute  
maximum junction temperature. The maximum power  
dissipation depends on the thermal resistance of the IC  
package, PCB layout, rate of surrounding airflow, and  
difference between junction and ambient temperature. The  
maximum power dissipation can be calculated by the  
following formula :  
PD(MAX) = (TJ(MAX) TA) / θJA  
where TJ(MAX) is the maximum junction temperature, TA is  
the ambient temperature, and θJA is the junction to ambient  
thermal resistance.  
0
25  
50  
75  
100  
125  
Ambient Temperature (°C)  
Figure 2.Derating Curve of Maximum PowerDissipation  
For recommended operating condition specifications, the  
maximum junction temperature is 125°C. The junction to  
ambient thermal resistance, θJA, is layout dependent. For  
WQFN-16L 3x3 package, the thermal resistance, θJA, is  
30°C/W on a standard JEDEC 51-7 four-layer thermal test  
board. The maximum power dissipation at TA = 25°C can  
be calculated by the following formula :  
Layout Considerations  
For the best performance of the RT2101B, the following  
guidelines must be strictly followed.  
The input capacitor should be placed as close as possible  
to the device pins (VINandGND).  
PD(MAX) = (125°C 25°C) / (30°C/W) = 3.33W for  
The RT/SYNC pin is sensitive. The RT resistor should  
be located as close as possible to the IC and minimal  
lengths of trace.  
WQFN-16L 3x3 package  
The maximum power dissipation depends on the operating  
ambient temperature for fixed TJ(MAX) and thermal  
resistance, θJA. The derating curve in Figure 2 allows the  
designer to see the effect of rising ambient temperature  
on the maximum power dissipation.  
The SW node is with high frequency voltage swing. It  
should be kept at a small area.  
Place the feedback components as close as possible  
to the IC and keep away from the noisy devices.  
The GND and AGND should be connected to a strong  
ground plane for heat sinking and noise protection.  
Copyright 2020 Richtek Technology Corporation. All rights reserved.  
©
is a registered trademark of Richtek Technology Corporation.  
DS2101B-06 March 2020  
www.richtek.com  
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