RT8057A
C
IN
and C
OUT
Selection
The input capacitance, C
IN
, is needed to filter the
trapezoidal current at the source of the top MOSFET. To
prevent large ripple voltage, a low ESR input capacitor
sized for the maximum RMS current should be used. RMS
current is given by :
I
RMS
=
I
OUT(MAX)
V
OUT
V
IN
V
IN
−
1
V
OUT
current handling requirements. Dry tantalum, special
polymer, aluminum electrolytic and ceramic capacitors are
all available in surface mount packages. Special polymer
capacitors offer very low ESR, but have lower capacitance
density than other types. Tantalum capacitors have the
highest capacitance density, but it is important to only use
types that have been surge tested for use in switching
power supplies. Aluminum electrolytic capacitors have
significantly higher ESR, but can be used in cost-sensitive
applications provided that consideration is given to ripple
current ratings and long term reliability. Ceramic capacitors
have excellent low ESR characteristics, but can have a
high voltage coefficient and audible piezoelectric effects.
The high Q of ceramic capacitors with trace inductance
can also lead to significant ringing.
Using Ceramic Input and Output Capacitors
Higher value, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, V
IN
. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at V
IN
large enough to damage the
part.
Table 2. Capacitors for C
IN
and C
OUT
This formula has a maximum at V
IN
= 2V
OUT
, where I
RMS
=
I
OUT
/2. This simple worst case condition is commonly used
for design because even significant deviations do not result
in much difference. Choose a capacitor rated at a higher
temperature than required.
Several capacitors may also be paralleled to meet size or
height requirements in the design.
The selection of C
OUT
is determined by the effective series
resistance (ESR) that is required to minimize voltage ripple
and load step transients, as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response. The output ripple,
Δ
V
OUT
, is
determined by :
⎡
1
⎤
Δ
V
OUT
≤ Δ
I
L
⎢
ESR
+
⎥
8fC
OUT
⎦
⎣
The output ripple is highest at maximum input voltage since
Δ
I
L
increases with input voltage. Multiple capacitors placed
in parallel may be needed to meet the ESR and RMS
Component Supplier
MuRata
MuRata
Part No.
GRM31CR71A475KA01
GRM31CR71A106KA01
Capacitance (μF)
4.7μF
10μF
Case Size
1206
1206
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature.
The maximum power dissipation can be calculated by
the following formula :
P
D(MAX)
= (T
J(MAX)
−
T
A
) /
θ
JA
where T
J(MAX)
is the maximum junction temperature, T
A
is
the ambient temperature, and
θ
JA
is the junction to ambient
thermal resistance.
DS8057A-00 March 2011
www.richtek.com
9
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
