RT8290
Ferrite core material saturates
“hard”,
which means that
inductance collapses abruptly when the peak design
current is exceeded. The previous situation results in an
abrupt increase in inductor ripple current and consequent
output voltage ripple.
Do not allow the core to saturate!
Different core materials and shapes will change the size/
current and price/current relationship of an inductor.
Toroid or shielded pot cores in ferrite or permalloy materials
are small and do not radiate energy. However, they are
usually more expensive than the similar powdered iron
inductors. The rule for inductor choice mainly depends
on the price vs. size requirement and any radiated field/
EMI requirements.
C
IN
and C
OUT
Selection
The input capacitance, C
IN,
is needed to filter the
trapezoidal current at the source of the high side MOSFET.
To prevent large ripple current, a low ESR input capacitor
sized for the maximum RMS current should be used. The
RMS current is given by :
V
I
RMS
= I
OUT(MAX) OUT
V
IN
V
IN
−
1
V
OUT
The output ripple will be highest at the maximum input
voltage since
ΔI
L
increases with input voltage. Multiple
capacitors placed in parallel may be needed to meet the
ESR and RMS current handling requirement. Dry tantalum,
special polymer, aluminum electrolytic and ceramic
capacitors are all available in surface mount packages.
Special polymer capacitors offer very low ESR value.
However, it provides lower capacitance density than other
types. Although Tantalum capacitors have the highest
capacitance density, it is important to only use types that
pass the surge test for use in switching power supplies.
Aluminum electrolytic capacitors have significantly higher
ESR. However, it can be used in cost-sensitive applications
for ripple current rating and long term reliability
considerations. Ceramic capacitors have excellent low
ESR characteristics but can have a high voltage coefficient
and audible piezoelectric effects. The high Q of ceramic
capacitors with trace inductance can also lead to significant
ringing.
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, V
IN
. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at V
IN
large enough to damage the
part.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
OUT
immediately shifts by an amount
equal to
ΔI
LOAD
(ESR) and C
OUT
also begins to be charged
or discharged to generate a feedback error signal for the
regulator to return V
OUT
to its steady-state value. During
this recovery time, V
OUT
can be monitored for overshoot or
ringing that would indicate a stability problem.
This formula has a maximum at V
IN
= 2V
OUT
, where
I
RMS
= I
OUT
/2. This simple worst-case condition is
commonly used for design because even significant
deviations do not offer much relief.
Choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to
meet size or height requirements in the design.
For the input capacitor, a 10μF x 2 low ESR ceramic
capacitor is recommended. For the recommended
capacitor, please refer to table 3 for more detail.
The selection of C
OUT
is determined by the required ESR
to minimize voltage ripple.
Moreover, the amount of bulk capacitance is also a key
for C
OUT
selection to ensure that the control loop is stable.
Loop stability can be checked by viewing the load transient
response as described in a later section.
The output ripple,
ΔV
OUT
, is determined by :
1
⎤
Δ
V
OUT
≤ Δ
I
L
⎡
ESR
+
⎢
8fC
OUT
⎥
⎣
⎦
DS8290-02 March 2011
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