QM Receiver Module
Application Circuit
The application circuit shows how the
QM
receiver can easily be integrated into a system to
form a wireless link.
QMR1 / QMR2
ANTENNA
+5V
+5V
1
2
3
4
5
6
7
8
9
A0
A1
A2
A3
A4
A5
A6
A7
VSS
HT12D
VDD
VT
OSC1
OSC2
DIN
D11
D10
D9
D8
18
17
16
15
14
13
12
11
10
DATA OUT 4
DATA OUT 3
DATA OUT 2
DATA OUT 1
R
OSC
1K5Ω
Ω
QMR1
1
2
3
4
5
6
7
ANTENNA
+5V
+5V
1
2
3
4
5
6
7
8
9
A0
A1
A2
A3
A4
A5
A6
A7
VSS
HT12D
VDD
VT
OSC1
OSC2
DIN
D11
D10
D9
D8
18
17
16
15
14
13
12
11
10
DATA OUT 4
DATA OUT 3
DATA OUT 2
DATA OUT 1
R
OSC
1K5Ω
Ω
QMR2
1
2
3
4
5
6
7
Figure 7: QM Receiver Application Circuits
Ds302_3
AUG 01
©
2001 REG No 277 4001 England
Page 6