Preliminary
RF2721
Pin
1
Function Description
Interface Schematic
Balanced IF input. An input level of 400mV gives full output swing; a
IF IN+
PP
level of maximum 250mV is recommended for linear operation. This
PP
IF IN+
1500 Ω
IF IN-
1500 Ω
pin has no internal DC block, and an external capacitor of 100nF is
needed if connected to a DC path.
350 Ω
350 Ω
Ground connection. For best performance, keep traces physically short
and connect immediately to ground plane.
2
3
GND
Base of the LO transistor. This pin is not connected to anything else.
This transistor can be used for an oscillator. The collector of the transis-
VCC
OSC B
tor is connected to V
.
CC
OSC B
OSC E
Emitter of the LO transistor. This pin is not connected to anything else. See pin 3.
Same as pin 2.
4
5
6
OSC E
GND
LO2-
Balanced input for the doubled LO. An internal divide-by-2 network
200 Ω
200 Ω
generates the actual LO for the mixers. The divided signal is not acces-
LO2+
sible. When the LO is driven single ended this pin should be connected
to a 100nF capacitor to ground. This pin has an internal pull-up resistor
7
LO2-
to V and an external DC blocking capacitor of 100nF is recom-
CC
mended.
Balanced input for the doubled LO. The input frequency should be
twice (2x) the IF frequency. An internal divide-by-2 network generates
the actual LO for the mixers. This pin has an internal pull-up resistor to
See pin 6.
7
LO2+
V
, and an external DC blocking capacitor of 100nF is recommended.
CC
LO frequencies below 100kHz are acceptable, providing that the LO
signal is square wave. Above 100kHz a sine wave signal is acceptable.
The quadrature accuracy of the LO/2 frequency into the mixers is
affected by the duty cycle of the LO input signal. Square wave signals
with other than 50% duty cycle will degrade the quadrature accuracy of
the LO signal, thereby adversely affecting the I and Q quadrature accu-
racy. Since the LO input is AC coupled, asymmetric sine waves and
sine waves clipped on either the top or bottom half will not have 50%
duty cycles relative to the internal DC reference point. For this reason,
distorted LO sine wave signals will degrade performance in a fashion
similar to non-50% duty cycle square waves. A sine wave input with
even harmonics less than -15dBc is recommended. The internal limit-
ing buffer amplifier ensures the amplitude stability of the demodulator.
Demodulated baseband Q output. The reference DC level of this pin is
set by the voltage of pin 9 (REF IN), which is connected to this pin
through a 5kΩ resistor to the collectors of this push-pull output. This
results in an output impedance of 5kΩ if the REF IN pin is connected to
a low impedance source. The capacitance of the load determines the
maximum baseband frequency. A very low capacitive load may stretch
the 3dB bandwidth over 10MHz. Another way to increase bandwidth is
by connecting a shunt resistor. This will trade-off gain for bandwidth.
8
9
Q OUT
REF IN
5 kΩ
REF IN
I/Q OUT
Reference voltage input for the baseband outputs. This pin can be con- See pin 8.
nected to the reference voltage source of the Analog to Digital Con-
verter. It is connected to the I and Q outputs through 5kΩ resistors.
This pin should have an external decoupling capacitor large enough to
decouple the lowest baseband frequency.
Rev A2 010509
2-29