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RF2713PCBA-D 参数 Datasheet PDF下载

RF2713PCBA-D图片预览
型号: RF2713PCBA-D
PDF下载: 下载PDF文件 查看货源
内容描述: 正交调制器/解调器 [QUADRATURE MODULATOR/DEMODULATOR]
分类和应用:
文件页数/大小: 14 页 / 178 K
品牌: RFMD [ RF MICRO DEVICES ]
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RF2713  
Pin  
1
Function Description (Modulator Configuration)  
Interface Schematic  
When the RF2713 is configured as a Quadrature Modulator, each  
mixer is driven by an independent baseband modulation channel (I and  
Q). The mixers can be driven single-endedly (as shown in the modula-  
tor application circuit) or differentially. When driving single-endedly, the  
B Inputs (pins 2 and 4) should be connected to each other. This  
ensures that the baseband signals will reach each mixer with the same  
DC reference, yielding the best carrier suppression. Note that the input  
impedance changes according to the drive mode (see the mixer equiv-  
alent circuit on the previous page). The single-ended input impedance  
(as shown in the modulator application circuit) is 1200Ω for each of the  
two inputs. In the balanced configuration, the input impedance would  
be 2400Ω for each of the two inputs.  
I INPUT A  
VCC  
VCC  
1260  
Ω
1260  
Ω
INPUT A  
INPUT B  
The mixers are Gilbert Cell designs with balanced inputs. The equiva-  
lent schematic for one of the mixers is shown on the previous page.  
The input impedance of each pin is determined by the 1200Ω resistor  
to V in parallel with a transistor base. Note from the schematic that  
CC  
all four input pins have an internally set DC bias. For this reason, all  
four inputs (pins 1 through 4) should be DC blocked. The capacitance  
values of the blocking capacitors is determined by the baseband fre-  
quency. When driving single-endedly, both the series (pins 1 and 3) and  
shunt (pins 2 and 4) blocking capacitors should be low impedances, rel-  
ative to the input impedance.  
DC bias voltages may be supplied to the inputs pins, if required, in  
order to increase the amount of carrier suppression. For example, the  
DC levels on the reference inputs (pins 2 and 4) may be offset from  
each other by adding different resistor values to ground. These resis-  
tors should be larger than 2kΩ. Note from the mixer schematic that all  
four input pins have an internally set DC bias. If DC bias is to be sup-  
plied, the allowable ranges are limited. For 5V applications, the DC ref-  
erence on both I pins or both Q pins must not go below 2.7V , and in  
DC  
no case should the DC voltage on any of the four pins go below 2.0V  
DC  
or above 5.5V . IF a DC reference is to be supplied, the source must  
DC  
also be capable of sinking current. If optimizing carrier suppression fur-  
ther is not a concern, it is recommended that all four inputs (pins 1  
through 4) be DC blocked.  
Same as pin 1, except complementary input.  
Same as pin 1, except Q Buffer Amplifier.  
Same as pin 3, except complementary input.  
See pin 1.  
See pin 1.  
See pin 1.  
2
3
4
5
I INPUT B  
Q INPUT A  
Q INPUT B  
BG OUT  
Band Gap voltage reference output. This voltage output is held con-  
stant over variations in supply voltage and operating temperature and  
may be used as a reference for other external circuitry. This pin should  
not be loaded such that the sourced current exceeds 1mA. This pin  
should be bypassed with a large (0.1μF) capacitor.  
Connecting pins 6 and 7 to each other accomplishes the summing  
function of the upconverted I and Q channels. In addition, because  
6
I IF OUT  
IF OUT  
these outputs are open collector type, they must be connected to V  
CC  
in order to properly bias the Gilbert Cell mixers. Maximum gain and out-  
put power occur when the load on these two pins is ~1200Ω. In most  
applications the impedance of the next stage will be lower and a reac-  
tive impedance transforming match should be used if maximum gain  
and output level are of concern. For applications where the gain is not  
as critical, a 1200Ω resistor may be added in parallel with a choke  
inductor. If neither gain nor output level is critical, the inductor may be  
replaced with a resistor that sets the desired source impedance to drive  
the next stage. If the next stage is an "open" at DC, the blocking capac-  
itor may be eliminated.  
7-52  
Rev A5 061016