RF2705G
Evaluation Board Schematic
VCC
MODE A
VCC
C7
12 pF
J2
I SIG P
50 Ω μstrip
J4
50 Ω μstrip
50 Ω μstrip
WB RF OUT
J1
I SIG N
L2
2.2 nH
L3
2.2 nH
C12
1.3 pF
T1
C1
1 nF
Murata
LDB211G9020C-001
MODE B
C2
4.3 pF
C3
4.3 pF
R1
1 kΩ
C6
5.6 pF
24
23
22
21
20
19
VCC
1
2
3
18
17
16
15
14
13
C11
22 pF
Note: The die flag is the
chip's main ground.
50 Ω μstrip
L1
3.9 nH
J5
HB RF OUT
J3
HB LO
50 Ω μstrip
50 Ω μstrip
C4
1.8 pF
R2
430 Ω
L4
4.3 nH
L5
4.3 nH
C5
DNI
T2
Murata
DIV
2
+45°
-45°
LDB211G8020C-001
C9
1.6 pF
R3
430 Ω
C10
1.6 pF
Σ
L6
22 nH
J6
LB LO
+45°
-45°
Flo
x2
4
C13
3 pF
VCC
Mode Control
and Biasing
Power
Control
5
6
C8
100 pF
50 Ω μstrip
J7
LB RF OUT
MODE C
MODE D
7
8
9
10
11
12
L7
12 nH
L8
12 nH
C18
0.5 pF
T3
Murata
LDB21906M20C-001
C14
10 nF
C15
1 nF
50 Ω μstrip
50 Ω μstrip
J8
Q SIG N
C17
3.3 pF
C16
3.3 pF
R4
1 kΩ
J9
Q SIG P
P2
1
P1
GC
1
2
3
P2-1
VCC
MODE D
MODE C
MODE B
MODE A
P1-1
P2-2
GND
2
P2-3
GC
P1-3
3
P2-4
4
CON3
CON4
Rev A0 060206
5-133
RFMD [ RF MICRO DEVICES ]
