RF2609
Pin
1
Function Description
Interface Schematic
CDMA Balanced Input Pin. This pin is internally DC biased and should
be DC blocked if connected to a device with a DC level, other than V
CDMA+
VCC
,
CC
present. A DC to connection to V is acceptable. For single-ended
CC
580 Ω
580 Ω
CDMA-
input operation, one pin is used as an input and the other CDMA input
is AC coupled to ground. The balanced input impedance is 1kΩ, while
the single-ended input impedance is 500Ω.
CDMA+
Same as pin 2, except complementary input.
See pin 1 schematic.
2
3
CDMA-
GND
Ground connection. Keep traces physically short and connect immedi-
ately to ground plane for best performance.
Same as pin 3.
4
5
6
7
8
GND
GND
GND
GND
NC
Same as pin 3.
Same as pin 3.
Same as pin 3.
No Connection pin. This pin is internally biased and should not be con-
nected to any external circuitry, including ground or V
.
CC
Balanced Output pin. This is an open-collector output, designed to
operate into a 500Ω balanced load. The load sets the operating imped-
9
OUT-
OUT+
OUT-
ance, but an external choke or matching inductor to V must also be
CC
supplied in order to correctly bias this output. This bias inductor is typi-
cally incorporated in the matching network between the output and next
stage. Because this pin is biased to V , a DC blocking capacitor must
CC
be used if the next stage’s input has a DC path to ground.
Same as pin 9, except complementary output.
See pin 9 schematic.
10
11
12
13
OUT+
GND
GND
VCC
Same as pin 3.
Same as pin 3.
Supply Voltage pin. External bypassing is required. The trace length
between the pin and the bypass capacitors should be minimized. The
ground side of the bypass capacitors should connect immediately to
ground plane. Pins 13, 14, and 15 may share one bypass capacitor if
trace lengths are kept minimal.
10
Same as pin 13.
Same as pin 13.
14
15
16
VCC
VCC
GC
Analog gain adjustment for all amplifiers. Valid control ranges are from
0V to 3.0V. Maximum gain is selected with 3.0V. Minimum gain is
selected with 0V. These voltages are valid only for a 3.3kΩ DC source
impedance.
VCC
12.7 kΩ
23.5 kΩ
15 kΩ
Rev B3 000822
10-11