RF2369
Pin
1
Function
VREF/PD
Description
Interface Schematic
For low noise amplifier applications, this pin is used to control the bias cur-
rent. An external resistor can be used to set the bias current for any V
VREF/PD
PD
voltage.
Ground connection. For best performance, keep traces physically short
and connect immediately to ground plane.
2
3
GND1
RF IN
RF input pin.
To Bias
Circuit
RF OUT
RF IN
Amplifier output pin. This pin is an open-collector output. It must be biased
4
5
RF OUT
GND2
to V through a choke or matching inductor. This pin is typically matched
CC
to 50Ω with a shunt bias/matching inductor and series blocking/matching
capacitor. Refer to application schematics.
LNA emittance inductance. Total inductance is comprised of
package+bondwire+stripline (L1) on PCB.
This pin selects high gain and bypass.
Select < 0.8V, high gain.
6
SELECT
Select > 1.8V, low gain.
Package Drawing
1.80
1.40
0.10
MAX.
0.50
0.35
3.10
2.70
1.90
0.90
0.70
3.00
2.60
1.30
1.00
Shaded lead is pin 1.
Dimensions in mm.
*When Pin 1 is in upper left,
text reads downward
(as shown).
9°
1°
0.25
0.10
0.37 MIN.
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
4 of 12
Rev B3 DS070816
RFMD [ RF MICRO DEVICES ]
