RF2174
Pin
1
Function
GND
Description
Internally connected to the ground slug.
Interface Schematic
See pin 15.
Control input for the PIN diode. The purpose of the PIN diode is to attenu-
2
AT_EN
To PIN
diode
ate the RF input drive level when the V
is low. This serves both to
APC
reduce the leakage through the device cause by self biasing when driving
with high level at the RF input, as well as to maintain a good input match
when the bias of the input stage is turned off. When this pin is “high” the
PIN diode control is turned on. See the Theory of Operation for more
details.
3k Ω
AT_EN
GND1
VCC1
RF Input. This is a 50Ω input, but the actual impedance depends on the
interstage matching network connected to pin 5. An external DC blocking
capacitor is required if this port is connected to a DC path to ground or a
DC voltage.
3
RF IN
RF IN
PIN
GND 1
From Attn
From Bias
control circuit Stages
Ground connection for the pre-amplifier stage. Keep traces physically short See pin 3.
and connect immediately to the ground plane for best performance. It is
important for stability that this pin has it’s own vias to the groundplane, to
minimize any common inductance.
4
5
6
GND1
VCC1
APC1
Power supply for the pre-amplifier stage and interstage matching. This pin See pin 3.
forms the shunt inductance needed for proper tuning of the interstage
match. Please refer to the application schematic for proper configuration,
and note that position and value of the components are important.
Power Control for the driver stage and pre-amplifier. When this pin is "low,"
A P C V C C
all circuits are shut off. A "low" is typically 0.5V or less at room tempera-
ture. A shunt bypass capacitor is required. During normal operation this pin
is the power control. Control range varies from about 1.0V for -10dBm to
2.6V for +33dBm RF output power. The maximum power that can be
achieved depends on the actual output matching; see the application infor-
mation for more details. The maximum current into this pin is 5mA when
To R F
S tages
V
=2.6V, and 0mA when V
=0V.
APC1
APC
G N D
G N D
Power Control for the output stage. See pin 6 for more details.
Power supply for the bias circuits.
See pin 6.
See pin 6.
7
8
APC2
VCC
Internally connected to the ground slug.
9
GND
RF Output and power supply for the output stage. Bias voltage for the final
stage is provided through this wide output pin. An external matching net-
work is required to provide the optimum load impedance.
10
RF OUT
RF OUT
GND
From Bias
Stages
PCKG BASE
Same as pin 10.
Same as pin 10.
Same as pin 10.
Same as pin 10.
11
12
13
RF OUT
RF OUT
2F0
Connection for the second harmonic trap. This pin is internally connected Same as pin 10.
to the RF OUT pins. The bonding wire together with an external capacitor
form a series resonator that should be tuned to the second harmonic fre-
quency in order to increase efficiency and reduce spurious outputs.
Same as pin 15.
14
VCC2
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Rev A8 DS060918