Preliminary
RF2162
Application Schematic - US TDMA
P1-1
10 nF
Bypassing for V
CC
100 pF
C30
2nd Harmonic Trap
Interstage tuning for
centering frequency response
TL5
3.6 pF
100 pF
16 nH*
1.5 nH
TL7
1
2
3
4
5
16
15
14
13
12
1 pF
100 pF
100 pF
1.5 nH
TL2
TL3
TL1
To Vary Gain
11
RF OUT
820 Ω
4.7 pF**
12 pF**
RF IN
10
100 pF
15 nH
6
7
8
9
Matching network for
optimum input return loss
Matching network for
optimum load
impedance
0 Ω
27 nH
100 pF
Bias Return
100 pF
Bypassing for
REG1 and VREG2
V
* L1 is a High Q inductor (i.e.,Coilcraft 0805HQ-series).
**C1 and C14 are High Q capacitors (i.e., Johanson C-series).
VREG
1 kΩ
VMODE
Rev A19 060208
2-231
RFMD [ RF MICRO DEVICES ]
