RF2153
Application Schematic
US - TDMA
Bypassing for VCC
VCC
2nd Interstage tuning for
centering frequency response
2
10 nF
15 pF
10 nF
10 pF
10 nF
15 pF
15 pF
1st Interstage tuning to
match input return loss
Ground for 2nd
Harmonic Trap
TL3
16
15
14
1
2
3
4
5
13
12
11
10
9
12 nH*
1 pF
1 nH
15 pF
TL2
TL1
To match input return loss
and vary gain
RF OUT
100
Ω
15 pF
4.7 pF**
1.8 pF**
RF IN
Matching Network for
optimum load impedance
15 nH
6
7
8
Bias return
0
Ω
0
Ω
Bypassing for
VREG1 and VREG2
15 pF
15 pF
VREG
4.7 kΩ
VMODE
* High Q inductor (i.e.,Coilcraft 0805HQ-series).
**High Q capacitors (i.e., Johanson C-series).
Tied together for optimum linearity
Transmission
Line Length
TL1
TL2
TL3
TDMA (US)
20 mils
160 mils
10 mils
Rev A18 001114
2-173