RF2115L
Pin
1
Function Description
Interface Schematic
Positive supply for the second stage (driver) amplifier. This is an
unmatched transistor collector output. This pin should see an inductive
VCC2
path to AC ground (V with a UHF bypassing capacitor). This induc-
CC
tance can be achieved with a short, thin microstrip line or with a low
value chip inductor (approximately 2.7nH). At lower frequencies, the
inductance value should be larger (longer microstrip line) and V
CC
should be bypassed with a larger bypass capacitor (see the application
schematic for 430MHz operation). This inductance forms a matching
network with the internal series capacitor between the second and third
stages, setting the amplifier’s frequency of maximum gain. An addi-
tional 1µF bypass capacitor in parallel with the UHF bypass capacitor is
also recommended, but placement of this component is not as critical.
In most applications, pins 1, 2, and 3 can share a single 1µF bypass
capacitor.
2
Positive supply for the active bias circuits. This pin can be externally
combined with pin 3 (VCC1) and the pair bypassed with a single UHF
capacitor, placed as close as possible to the package. Additional
bypassing of 1µF is also recommended, but proximity to the package is
not as critical. In most applications, pins 1, 2, and 3 can share a single
1µF bypass capacitor.
2
3
VCC3
VCC1
Positive supply for the first stage (input) amplifier. This pin can be exter-
nally combined with pin 2 (VCC3) and the pair bypassed with a single
UHF capacitor, placed as close as possible to the package. Additional
bypassing of 1µF is also recommended, but proximity to the package is
not as critical. In most applications, pins 1, 2, and 3 can share a single
1µF bypass capacitor. This pin can also be used for coarse analog gain
control, even though it is not optimized for this function.
Ground connection. Keep traces physically short and connect immedi-
ately to ground plane for best performance. In addition, for specified
performance, the package’s backside metal should be soldered to
ground plane.
4
5
GND
PD
Power down control voltage. When this pin is at 0V, the device will be in
power down mode, dissipating minimum DC power. When this pin is at
5V the device will be in full power mode delivering maximum available
gain and output power capability. This pin may also be used to perform
some degree of gain control or power control when set to voltages
between 0V and 5V. It is not optimized for this function so the transfer
function is not linear over a wide range as with other devices specifi-
cally designed for analog gain control; however, it may be usable for
coarse adjustment or in some closed loop AGC systems. This pin
should not, in any circumstance, be higher in voltage than V , nor
CC
should it ever be higher than 6.5V. This pin should also have an exter-
nal UHF bypassing capacitor.
Amplifier RF input. This is a 50Ω RF input port to the amplifier. It does
not contain internal DC blocking and therefore should be externally DC
blocked before connecting to any device which has DC present or
which contains a DC path to ground. A series UHF capacitor is recom-
mended for the DC blocking.
6
RF IN
RF output power gain control MSB (see specification table for logic).
7
8
9
G20
G10
NC
The control voltage at this pin should never exceed V . This pin
CC
should also have an external UHF bypassing capacitor.
RF output power gain control LSB (see specification table for logic).
The control voltage at this pin should never exceed V . This pin
CC
should also have an external UHF bypassing capacitor.
Not internally connected.
Rev B1 010329
2-41