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RF2114PCBA 参数 Datasheet PDF下载

RF2114PCBA图片预览
型号: RF2114PCBA
PDF下载: 下载PDF文件 查看货源
内容描述: 中功率线性放大器 [MEDIUM POWER LINEAR AMPLIFIER]
分类和应用: 放大器
文件页数/大小: 6 页 / 76 K
品牌: RFMD [ RF MICRO DEVICES ]
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RF2114  
Pin  
1
Function Description  
Interface Schematic  
RF input pin. This pin is internally connected to the bias circuits. An  
RF1 IN  
external DC blocking capacitor is required. The value of this capacitor  
depends on the actual operating frequency.  
Ground connection. Keep the connection to the backside ground plane  
as short as possible, by placing the vias close to the pin.  
2
GND  
Same as pin 2.  
3
4
GND  
PD  
2
Power down control voltage. When this pin is at 0V, the device will be in  
power down mode, dissipating minimum DC power. When this pin is at  
V
(but not higher than 5.0V max), the device will be in full power  
CC  
mode delivering maximum gain and output power capability. This pin  
may also be used to perform some degree of gain control or power con-  
trol when set to voltages between 0V and V or 5.0V, whichever is the  
CC  
lowest. It is not optimized for this function so the transfer function is not  
linear over a wide range as with other devices specifically designed for  
analog gain control. However, it may be usable for coarse adjustment or  
in some closed loop AGC systems. This pin should not, in any circum-  
stance, be higher in voltage than V . This pin should also have an  
CC  
external bypassing capacitor.  
RF input of the power stage. This pin is internally connected to the bias  
circuits. An external DC blocking capacitor is required. This same  
capacitor can also be used for interstage matching. Typically this  
capacitor is between RF2 IN (pin 5) and RF1 OUT (pin 6); see the  
application schematics for details.  
5
RF2 IN  
RF output of the pre-amplifier. Power supply needs to be supplied to  
6
7
8
RF1 OUT  
VCC1  
this pin through an inductor to V . Together with the series capacitor  
CC  
between pin 5 and 6 the interstage matching circuit is formed. See the  
application schematics for values for different frequencies.  
Positive supply for the active bias circuits. This needs to be bypassed  
with a single capacitor, placed as close as possible to the package.  
Additional bypassing of 1µF is also recommended, but proximity to the  
package is not as critical.  
Amplifier RF output. This is an unmatched collector output of the final  
amplifier transistor. Pins 8, 9, 13, and 14 are connected internally. Bias  
for the final power amplifier output transistor must also be provided  
through one of these two pins. Typically, pins 8 and 9 are connected to  
a network that provides the DC bias and also creates a second har-  
monic trap. A capacitor series resonates with internal bond wires and  
some additional series inductance, and acts as a trap at two times the  
operating frequency, effectively shorting out the second harmonic.  
Shorting out this harmonic serves to increase the amplifier’s maximum  
output power and efficiency, as well as to lower the level of the second  
harmonic output. Typically, pins 13 and 14 are externally connected  
very close to the package and used as the RF output with a matching  
network that presents the optimum load impedance to the PA for maxi-  
mum power and efficiency, as well as providing DC blocking at the out-  
put.  
RF2 OUT  
Same as pin 8.  
Same as pin 2.  
Same as pin 2.  
Same as pin 2.  
Same as pin 8.  
Same as pin 8.  
9
RF2 OUT  
GND  
GND  
GND  
RF2 OUT  
RF2 OUT  
10  
11  
12  
13  
14  
Rev A5 001222  
2-35