RF2103P
Pin
1
Function Description
Interface Schematic
RF input pin. There is an internal blocking capacitor between this pin
RF IN
and the preamp input, but not between the pin and an internal 2kΩ
resistor to ground.
Ground connection. For best performance, keep traces physically short
and connect immediately to ground plane.
2
GND
Same as pin 2.
3
4
GND
PD
2
Power down control voltage. When this pin is at 0V, the device will be in
power down mode, dissipating minimum DC power. When this pin is at
V
(3V to 6.5V), the device will be in full power mode delivering maxi-
CC
mum available gain and output power capability. This pin may also be
used to perform some degree of gain control or power control when set
to voltages between 0V and V . It is not optimized for this function so
CC
the transfer function is not linear over a wide range as with other
devices specifically designed for analog gain control; however, it may
be usable for coarse adjustment or in some closed loop AGC systems.
This pin should not, in any circumstance, be higher in voltage than V
.
CC
This pin should also have an external bypassing capacitor.
Positive supply for the active bias circuits. This pin can be externally
combined with pin 6 (VCC2) and the pair bypassed with a single capac-
itor, placed as close as possible to the package. Additional bypassing
5
VCC1
µ
of 1 F is also recommended, but proximity to the package is not as crit-
µ
ical. In most applications, pins 5, 6, and 7 can share a single 1 F
bypass capacitor.
Same as pin 5.
6
7
VCC2
PREAMP
PWR
Positive supply for the pre-amplifier. This is an unmatched transistor
collector output. This pin should see an inductive path to AC ground
(V with bypass capacitor). This inductance can be achieved with a
CC
short, thin microstrip line or with a low value chip inductor (approxi-
mately 1.8nH). At lower frequencies, the inductance value should be
larger (longer microstrip line) and V should be bypassed with a
CC
larger bypass capacitor. This inductance forms a matching network
with the internal series capacitor between the two amplifier stages, set-
ting the amplifier’s frequency of maximum gain. An additional 1µF
bypass capacitor in parallel with the 100pF bypass capacitor is also
recommended, but placement of this component is not as critical. In
most applications, pins 5, 6, and 7 can share a single 1µF bypass
capacitor.
Same as pin 14.
Same as pin 14.
Same as pin 2.
Same as pin 2.
Same as pin 2.
Same as pin 14.
8
9
10
11
12
13
RF OUT
RF OUT
GND
GND
GND
RF OUT
Rev B1 010720
2-3
RFMD [ RF MICRO DEVICES ]
