6
7
GND
GND
This is a ground pin.
This is a ground pin.
This pin is the receiver low-pass filter bandwidth adjust, and is connected directly to the transceiver LPFADJ pin.
R6 on the circuit board (330 K) is connected between LPFADJ and ground will be in parallel with any external re-
sistor connected to LPF ADJ. The filter bandwidth is set by the parallel resistance of R6 and the external resistor
(if used). The equivalent resistor value can range from 330 K to 820 ohms, providing a filter 3 dB bandwidth f
LPF
from 4.4 kHz to 1.8 MHz. The 3 dB filter bandwidth is determined by:
f
LPF
= 1445/ (330*R
LPF
/(330 + R
LPF
)), where R
LPF
is in kilohms, and f
LPF
is in kHz
8
LPF ADJ
A ±5% resistor should be used to set the filter bandwidth. This will provide a 3 dB filter bandwidth between f
LPF
and 1.3* f
LPF
with variations in supply voltage, temperature, etc. The filter provides a three-pole, 0.05 degree
equiripple phase response. The peak drive current available from RXDATA increases in proportion to the filter
bandwidth setting. As shipped, the transceiver module is set up for nominal 2.4 kbps operation. An external resis-
tor can be added between Pin 6 and ground to support higher data rates. Preamble training times will not be
decreased, however, unless C3 is replaced with a smaller capacitor value (see the descriptions of Pins 2 and 3
above). Refer to sections 1.4.3, 2.5.1 and 2.6.1 in the
ASH Transceiver Designer’s Guide
for additional informa-
tion on data rate adjustments.
This is the positive supply voltage pin for the module. The operating voltage range is 2.7 to 3.5 Vdc. It is also pos-
sible to use Pin 1 as the Vcc input. Please refer to the Pin 1 description above.
This is the supply voltage return pin.
CTR1 is connected to the CNTRL1 control pin on the transceiver. CTR1 and CTR0 select the transceiver operat-
ing modes. CTR1 and CTR0 both high place the unit in the receive mode. CTR1 and CTR0 both low place the unit
in the power-down (sleep) mode. CTR1 high and CTR0 low place the unit in the ASK transmit mode. CTR1 low
and CTR0 high place the unit in the OOK transmit mode. CTR1 is a high-impedance input (CMOS compatible).
This pin must be held at a logic level; it cannot be left unconnected. At turn on, the voltage on this pin and CTR0
should rise with VCC until VCC reaches 2.7 Vdc (receive mode). Thereafter, any mode can be selected.
CTR0 is connected to the CNTRL0 control pin on the transceiver CTR0 is used with CTR1 to control the operating
modes of the transceiver. CTR0 is a high-impedance input (CMOS compatible). This pin must be held at a logic
level; it cannot be left unconnected. At turn on, the voltage on this pin and CTR1 should rise with VCC until VCC
reaches 2.7 Vdc (receive mode). Thereafter, any mode can be selected.
RFIO is the RF input/output pin. A matching circuit for a 50 ohm load (antenna) is implemented on the circuit
board between this pin and the transceiver SAW filter transducer.
This pin is the RF ground (return) to be used in conjunction with the RFIO pin. For example, when connecting the
transceiver module to an external antenna, the coaxial cable ground is connected this pin and the coaxial cable
center conductor is connected to RFIO.
9
10
VCC
GND
11
CTR1
12
CTR0
13
RFIO
14
RF GND
2 .4 k b p s A p p lic a tio n C ir c u it
R /T
3 V d c
1 9 .2 k b p s A p p lic a tio n C ir c u it
R /T
3 V d c
1 2
1 3
1 4
1 1
1 0
9
8
7
1 2
1 3
6
1 4
1
5
6 .2 K
D a ta In
D a ta O u t
1 1
1 0
9
8
7
6
3 3 K
D R 3 1 0 3
1
2
3
4
D R 3 1 0 3
2
3
4
5
6 .2 K
D a ta In
D a ta O u t
4
RFM [ RF MONOLITHICS, INC ]
