RQJ0304DQDQA
Silicon P Channel MOS FET
Power Switching
REJ03G1717-0100
Rev.1.00
Jul 28, 2008
Features
•
Low gate drive
V
DSS
: –30 V and 2.5 V gate drive
•
Low drive current
•
High speed switching
•
Small traditional package (MPAK)
Outline
RENESAS Package code: PLSP0003ZB-A
(Package name: MPAK)
3
D
3
1
2
2
G
1. Source
2. Gate
3. Drain
S
1
Notes: Marking is "DQ".
Absolute Maximum Ratings
(Ta = 25°C)
Item
Drain to source voltage
Gate to source voltage
Drain current
Drain peak current
Body - drain diode reverse drain current
Channel dissipation
Channel temperature
Storage temperature
Symbol
V
DSS
V
GSS
I
D
I
D(pulse) Note1
I
DR
Pch
Note2
Tch
Tstg
Ratings
–30
+8 / –12
–1.8
–8
1.8
0.8
150
–55 to +150
Unit
V
V
A
A
A
W
°C
°C
Notes: 1. PW
≤
10
µs,
Duty cycle
≤
1%
2. When using the glass epoxy board (FR-4 40
×
40
×
1 mm)
REJ03G1717-0100 Rev.1.00 Jul 28, 2008
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