R8C/13 Group
1. Overview
1.3 Block Diagram
Figure 1.1 shows this MCU block diagram.
1
2
8
5
8
Port P4
Port P3
I/O port
Port P0
Port P1
Peripheral functions
Timer
A/D converter
(10 bits ✕ 12 channels)
System clock generator
Timer X (8 bits)
Timer Y (8 bits)
Timer Z (8 bits)
Timer C (16 bits)
UART or Clock synchronous
serial I/O
X
IN-XOUT
High-speed on-chip oscillator
Low-speed on-chip oscillator
(8 bits ✕ 1 channel)
UART
(8 bits ✕ 1 channel)
R8C/Tiny Series CPU core
Memory
SB
ROM(1)
R0H
R1H
R0L
R1L
Watchdog timer
(15 bits)
USP
ISP
R2
R3
RAM(2)
INTB
PC
FLG
A0
A1
FB
Multiplier
NOTES:
1. ROM size depends on MCU type.
2. RAM size depends on MCU type.
Figure 1.1 Block Diagram
Rev.1.20 Jan 27, 2006 page 3 of 205
REJ09B0111-0120
RENESAS [ RENESAS TECHNOLOGY CORP ]
