M65667FP
Application Example
Sub-picture displaying on/off
Horizontal sync input signal (main-picture)
PIP Chroma signal output
Vertical sync input signal (main-picture)
33
32
31
30
29
28
Ana.
68 pF
Ana.
10
µF
103 F
104 F
+
470
Ω
Ana.
150 pF
103 F
360
Ω
103 F
Dig
10
µF
104 F
43
42
41
40
39
38
37
103 F
36
35
34
48
49
50
51
52
47
46
45
44
+
15 kΩ
Ana.
PIP Luma signal output
Luma signal input
(main-picture)
Chroma input signal
(main-picture)
104 F
53
54
10 kΩ
15 kΩ
Dig
+
10
µF
Dig 5 V 12 kΩ
47 kΩ
10 kΩ
Dig 5 V
12 kΩ
47 kΩ
100
Ω
100
Ω
100
Ω
SCL
SDA
27
26
104 F
55
56
M65667FP
25
24
23
22
21
20
19
18
17
103 F
51
Ω
14 pF
104 F 330
Ω
103 F
Ana.
+ 10
µF
103 F
2 kΩ
3.3
µF
100 kΩ
470 kΩ
57
58
59
60
61
62
63
64
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
560
Ω
330
Ω
Digital +3.3 V
power supply
Digital GND
Ana.
Analog +3.3 V
power supply
Analog GND
Ana.
104 F
103 F 103 F
10
µF
+
103 F 103 F
10
µF
+
100 kΩ
+
103 F
Ana.
SYNC SEP
Circuit
(Optional)
103 F
104 F
10
µF
Dig
Composite video
input signal
(sub-picture)
+
Note:
Separate Y/C signals by using LC-tank circuit or LPF, BPF for Y/C signals level adjust.
And then mix both signals for sub-picture input video signal.
REJ03F0185-0201 Rev.2.01 Mar 31, 2008
Page 11 of 12
I
2
C BUS DATA
input/output signal
I
2
C BUS Clock
input signal
RENESAS [ RENESAS TECHNOLOGY CORP ]
