M62463AFP
Serial Data Control Format
(1) Data input format
DATA is read at the rising edge of SCK, and loaded last 16 bits at the rising edge of REQ.
DATA
SCK
REQ
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
"H"
D0
L
D1
L
D2
D3
D4
Pro
Logic
mode
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
L
D15
H
Mode set
Center
mode
Auto-
balance
set to
"L"
Sch volume
H
H
L
H
Delay time
Noise sequencer
Cch volume
Chip
address
Surround/echo mode
Test mode (user inhibit)
(2) Control condition
No.
1
2
3
4
5
6
7
8
9
Control Mode
Mode set
Pro Logic mode
Center mode
Delay time
Auto-balance
Noise sequencer
Surround/echo mode
Cch/Sch volume
Chip address
Contents
Normal stereo/Dolby Pro Logic/space surround or echo/mute
4 ch Pro Logic/3 ch stereo
Wide/Normal/Phantom/OFF
15.4, 20.5, 25.6, 29.2, 51.2 ms (for surround)
123,184 ms (for echo)
Input auto-balance ON/OFF
ON/OFF Lch/Rch/Cch/Sch
Delay input L – R/(L + R) / 2 /MICin
Feedback volume, microphone volume, delay output mixing
0 to –87 dB / 1 dB step, and –∞
Input data effect or not
(3) Set conditions
Mode Setting (D0 = "L", D1 = "L")
D2
L
L
H
H
D3
L
H
L
H
Condition
Normal stereo (bypass)
Dolby Pro Logic surround
Space surround/echo
Output mute
Pro Logic Mode Setting (D0 = "L", D1 = "L")
D4
L
H
Condition
4 ch Pro Logic
3 ch stereo
Center Mode Setting (D0 = "L", D1 = "L")
D5
L
L
H
H
D6
L
H
L
H
Condition
Wide
Normal
Phantom
OFF
REJ03F0275-0200 Rev.2.00 Jun 16, 2008
Page 8 of 16
RENESAS [ RENESAS TECHNOLOGY CORP ]
