M62419FP
Relationship between Data and Clock
CLOCK
D0
DATA
D1
D2
D3
D11
D12
D13
LATCH SIGNAL "H"
DATA reading mode;
The rising edge of the CLOCK signal
LATCH reading mode;
The falling edge of the CLOCK signal
Digital Circuit DC Characteristics
Limits
Item
"L" level input voltage
"H" level input voltage
"L" level input current
"H" level input current
Symbol
V
IL
V
IH
I
IL
I
IH
Min
0
0.8 V
DD
–10
—
Typ
~
~
—
—
Max
0.2 V
DD
V
DD
10
10
Unit
V
µA
Test Conditions
DATA, CLOCK pins
Vi = 0
Vi = V
DD
DATA, CLOCK pins
Digital Circuit AC Characteristics
Limits
Item
CLOCK cycle time
CLOCK pulse width ("H" level)
CLOCK pulse width ("L" level)
CLOCK rise time
CLOCK fall time
DATA setup time
DATA hold time
t
cr
t
WHC
t
WLC
t
r
t
f
t
SD
t
HD
Symbol
Min
4
1.6
1.6
—
—
0.8
0.8
Typ
—
—
—
—
—
—
—
Max
—
—
—
0.4
0.4
—
—
Unit
µs
Rev.2.00 Sep 14, 2006 page 4 of 8
RENESAS [ RENESAS TECHNOLOGY CORP ]
