M62393P/FP
I
2
C BUS Line Characteristics
Item
SCL clock frequency
Time the bus must be free before a new
transmission can start
Hold time start condition. After this period.
The first clock pulse is generated.
Low period of the clock
High period of the clock
Setup time for start condition (only relevant for a
repeated start condition)
Hold time data
Setup time data
Rise time of both SDA and SCL lines
Fall time of both SDA and SCL lines
Setup time for stop condition
Note:
Symbol
f
SCL
t
BUF
t
HD : STA
t
LOW
t
HIGH
t
SU : STA
t
HD : DAT
t
SU : DAT
t
R
t
F
t
SU : STO
Normal Mode
Min
Max
0
4.7
4.0
4.7
4.0
4.7
0
250
—
—
4.0
100
—
—
—
—
—
—
—
1000
300
—
High Speed Mode
Min
Max
0
1.3
0.6
1.3
0.6
4.7
0
100
20
20
0.6
400
—
—
—
—
—
0.9
—
300
300
—
Unit
kHz
µs
µs
µs
µs
µs
µs
ns
ns
ns
µs
Transmitter must internally at reset a hold time to bridge the undefined region (300 ns Max) of the falling edge of
SCL.
Timing Chart
tr, tf
t
BUF
V
IH
SDA
V
IL
t
HD:STA
t
SU:DAT
t
HD:DAT
t
SU:STA
t
SU:STO
V
IH
SCL
V
IL
t
LOW
t
HIGH
Start
Start
Stop
Start
REJ03D0884-0300 Rev.3.00 Mar 25, 2008
Page 4 of 6
RENESAS [ RENESAS TECHNOLOGY CORP ]
