M61527FP
System Block Diagram
CLOCK
Multi
FRin
Multi
FLin
DVDD AVEE AVCC
DGND
REC OUTL
1
2
3
4
Lch
5
6
7
8
9
10
1
2
3
4
Rch
5
6
7
8
9
10
REC OUTR
Balance Output
R channel
Input ATT
(for ADC) Balance Output
L channel
Multi
SLin
Multi
SRin
Input ATT
(for ADC)
Multi
Cin
Multi
SWin
Input Gain
Control
MCU I/F
Input Gain
Control
Output Gain
Control
LATCH
DATA
Rev.1.0, Sep.19.2003, page 2 of 17
10 Input selector
10 Input selector
Lout
Input Gain
Control
Output Gain
Control
Rout
Output Gain
Control
Input Gain
Control
Output Gain
Control
Input Gain
Control
Output Gain
Control
SLout
SRout
Cout
Input Gain
Control
Output Gain
Control
SWout
GND