M61509FP
Control Signals Specification
(1) Wave Form
Threshold of the internal
DATA (H/L)
Dn + 0
H
(CLOCK,
DATA,
M
STROBE)
L
Dn + 1
Dn + 10
Dn + 11
t
or
2.5 V
Threshold of the internal
STROBE
2.5 V
1.25 V
0 V DATA: L
DATA: H
t
r
t
WH
t
f
t
r
t
f
t
r
t
WH
t
WL
t
WH
Threshold of the internal
CLOCK
The internal DATA latch at the falling edges of this clock signal.
(2) Voltage Control Signal
Digital input signal
L signal
M signal
H signal
L
M
H
Min
GND
1.0
2.1
Limits
Typ
—
1.25
(VDD/2)
—
Max
0.4
1.5
VDD
Unit
V
Condition
VDD
=
2.5 V, VSS
= −2.5
V
VDD
=
2.5 V, VSS
= −2.5
V
VDD
=
2.5 V, VSS
= −2.5
V
(3) Timing Control Signal
Item
Cycle time of digital signal
Pulse width of digital signal (“H” level)
Pulse width of digital signal (“L” level)
Rise time of digital signal
Fall time of digital signal
Symbol
t
cr
t
WH
t
WLC
t
r
t
f
Min
8
3.6
3.6
—
—
Limits
Typ
—
—
—
—
—
Max
—
—
—
0.4
0.4
Unit
µs
(
4) Control Signal Example (Refer to the “Control Data Format”)
An example of the mode control
Bypass/QXpander SW: QXpander
VOL/Treble Share AMP Gain: 20 dB
Input: IN A,
Volume: 0 dB
Mute: OFF
Mode: STEREO
Bass: 18 dB
Treble: 6 dB
Recout: ON (IN E)
(MSB)
2.5 V
1.25 V
0V
(GND)
D01 D11 D21 D31 D41 D51 D61 D71 D81 D91 D101 D111 D121 D131 STROBE
D02 D12 D22 D32 D42 D52 D62 D72 D82 D92 D102 D112 D122 D132 STROBE
REJ03F0215-0201 Rev.2.01 Mar 31, 2008
Page 5 of 13
RENESAS [ RENESAS TECHNOLOGY CORP ]
