RENESAS LSIs
M5M5256DFP,VP-55LL,-70LL,-70LLI,
-55XL,-70XL
262144-BIT (32768-WORD BY 8-BIT) CMOS STATIC RAM
FUNCTION
The operation mode of the M5M5256DFP,VP is
determined by a combination of the dev ice control inputs
/S, /W and /OE. Each mode is summarized in the f unction
table.
A write cy cle is executed whenev er the low lev el /W
ov erlaps with the low lev el /S. The address must be set
up bef ore the write cy cle and must be stable during the
entire cy cle. The data is latched into a cell on the trailing
edge of /W, /S, whichev er occurs f irst, requiring the set-
up and hold time relativ e to these edge to be maintained.
The output enable /OE directly controls the output stage.
Setting the /OE at a high lev el,the output stage is in a
high-impedance state, and the data bus contention
problem in the write cy cle is eliminated.
A read cy cle is executed by setting /W at a high lev el
and /OE at a low lev el while /S are in an activ e state.
When setting /S at a high lev el, the chip is in a non-
selectable mode in which both reading and writing are
disabled. In this mode, the output stage is in a high-
impedance state, allowing OR-tie with other chips and
memory expansion by /S. The power supply current is
reduced as low as the stand-by current which is specif ied
as Icc3 or Icc4, and the memory data can be held at
+2V power supply , enabling battery back-up operation
during power f ailure or power-down operation in the non-
selected mode.
FUNCTION TABLE
/S
H
L
L
L
/W
X
L
H
/OE
X
X
L
Mode
Non selection
Write
Read
DQ
High-impedance
D
IN
D
OUT
Icc
Stand-by
Activ e
Activ e
High-impedance
Activ e
H
H
Note • "H" and "L" in this table mean VIH and VIL, respectiv ely .
• "X" in this table should be "H" or "L".
BLOCK DIAGRAM
A8
A 13
A 14
A 12
A7
A6
A5
A4
ADDRESS
INPUT
A3
25
26
1
2
2
3
4
5
6
7
(512 ROWS X
17
512 COLUMNS)
18
19
32768 WORD
X 8BIT
11
12
13
15
16
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DATA I/O
A2
A1
A0
A 10
A 11
A9
WRITE CONTROL
INPUT /W
CHIP SELECT
INPUT
/S
8
9
10
21
23
24
CLOCK
GENERATOR
27
20
28
14
VCC
(5V)
GND
(0V)
OUTPUT ENABLE
/OE
INPUT
22
2
RENESAS [ RENESAS TECHNOLOGY CORP ]
