MITSUBISHI MICROCOMPUTERS
M37702M2AXXXFP, M37702M2BXXXFP
M37702S1AFP, M37702S1BFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
STACK POINTER (S)
Stack pointer (S) is a 16-bit register. It is used during a subroutine
call or interrupts. It is also used during stack, stack pointer rela-
tive, or stack pointer relative indirect indexed Y addressing mode.
PROCESSOR STATUS REGISTER (PS)
Processor status register (PS) is an 11-bit register. It consists of a
flag to indicate the result of operation and CPU interrupt levels.
Branch operations can be performed by testing the flags C, Z, V,
and N.
The details of each processor status register bit are described
below.
PROGRAM COUNTER (PC)
Program counter (PC) is a 16-bit counter that indicates the low-or-
der 16-bits of the next program memory address to be executed.
There is a bus interface unit between the program memory and
the CPU, so that the program memory is accessed through bus in-
terface unit. This is described later.
1. Carry flag (C)
The carry flag contains the carry or borrow generated by the ALU
after an arithmetic operation. This flag is also affected by shift and
rotate instructions. This flag can be set and reset directly with the
SEC and CLC instructions or with the SEP and CLP instructions.
PROGRAM BANK REGISTER (PG)
Program bank register is an 8-bit register that indicates the high-
order 8 bits of the next program memory address to be executed.
When a carry occurs by incrementing the contents of the program
counter, the contents of the program bank register (PG) is
incremented by 1. Also, when a carry or borrow occurs after add-
ing or subtracting the offset value to or from the contents of the
program counter (PC) using branch instruction, the contents of the
program bank register (PG) is incremented or decremented by 1
so that programs can be written without worrying about bank
boundaries.
2. Zero flag (Z)
This zero flag is set if the result of an arithmetic operation or data
transfer is zero and reset if it is not. This flag can be set and re-
set directly with the SEP and CLP instructions.
3. Interrupt disable flag (I)
When the interrupt disable flag is set to “1”, all interrupts except
____
watchdog timer, DBC, and software interrupt are disabled. This
flag is set to “1” automatically when there is an interrupt. It can be
set and reset directly with the SEI and CLI instructions or SEP and
CLP instructions.
DATA BANK REGISTER (DT)
Data bank register (DT) is an 8-bit register. With some addressing
modes, a part of the data bank register (DT) is used to specify a
memory address. The contents of data bank register (DT) is used
as the high-order 8 bits of a 24-bit address. Addressing modes
that use the data bank register (DT) are direct indirect, direct in-
dexed X indirect, direct indirect indexed Y, absolute, absolute bit,
absolute indexed X, absolute indexed Y, absolute bit relative, and
stack pointer relative indirect indexed Y.
4. Decimal mode flag (D)
The decimal mode flag determines whether addition and subtrac-
tion are performed as binary or decimal. Binary arithmetic is
performed when this flag is “0”. If it is “1”, decimal arithmetic is
performed with each word treated as two or four digit decimal.
Arithmetic operation is performed using four digits when the data
length flag m is “0” and with two digits when it is “1”. (Decimal op-
eration is possible only with the ADC and SBC instructions.) This
flag can be set and reset with the SEP and CLP instructions.
DIRECT PAGE REGISTER (DPR)
Direct page register (DPR) is a 16-bit register. Its contents is used
as the base address of a 256-byte direct page area. The direct
page area is allocated in bank 0, but when the contents of DPR is
FF01
16
or greater, the direct page area spans across bank 0
16
and
bank 1
16
. All direct addressing modes use the contents of the di-
rect page register (DPR) to generate the data address. If the
low-order 8 bits of the direct page register (DPR) is “00
16
”, the
number of cycles required to generate an address is minimized.
Normally the low-order 8 bits of the direct page register (DPR) is
set to “00
16
”.
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RENESAS [ RENESAS TECHNOLOGY CORP ]
