MITSUBISHI MICROCOMPUTERS
M37274EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
Clock Source Control Register
b7 b6 b5 b4 b3 b2 b1 b0
Clock source control register (CS) [Address 021616
]
B
0
Name
CC mode clock
Functions
After reset
0
R
R
W
W
0: Data slicer clock
1: OSC1 clock
selection bit (CS0)
b2 b1
1, 2 OSD mode clock selection
bits (CS1, CS2)
0
R
W
0
0
1
1
0: Data slicer clock
1: OSC1 clock
0: Main clock (See note 1)
1: Do not set
3
EXOSD mode clock
selection bit (CS3)
0: Data slicer clock
1: OSC1 clock
0
0
R
R
W
W
b5 b4
4, 5
OSD oscillating mode
selection bits (CS4, CS5)
0
0
0: 32 kHz oscillating mode
1: Input ports P6 , P6
(See note 2)
0: LC oscillating mode
1: Ceramic • quartz-crystal
oscillating mode
3
4
1
1
0
0
6
7
Pre-divide ratio of layer 2
selection bit (CS6)
R
R
W
W
0: ✕ 1
1: ✕ 2
Test bit
(See note 3)
Notes 1: When setting “102,” main clock is set as a clock in the CC mode and
EXOSD mode regardless of bits 0, 3.
2: When selecting input ports P63 and P64, set bit 7 at address 00C716
to “0.”
3: Be sure to set bit 7 to “0” for program of the mask and the EPROM
versions. For the emulator MCU version (M37274ERSS), be sure to set
bit 7 to “1” when using the data slicer clock for software debugging.
Fig. 77. Clock Control Register
76
RENESAS [ RENESAS TECHNOLOGY CORP ]
