MITSUBISHI MICROCOMPUTERS
M37274EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
Window L Register 2
b7 b6 b5b4 b3 b2b1 b0
Window L register 2 (WL2) [Address 021F16
]
B
Name
Functions
After reset
R
W
0, 1
Top boundary position (high-order 2 bits)
TH ✕
(setting value of low-order 2 bits of WL2
+ setting value of high-order 4 bits of WL1
+ setting value of low-order 4 bits of WL1
Indeterminate R W
Control bits of window
top boundary
(WL20, WL21)
(See note 1)
✕
✕
✕
162
161
160)
2
to
7
Nothing is assigned. These bits are write disable bits.
When these bits are read out, the values are indeterminate.
Indeterminate R —
Notes 1: Set values fit for the following condition: (WH1+WH2 ✕162)<(WL1+WL2✕ꢀ
162)
2: T is cycle of HSYNC
3: WL1: Window L register 1
ꢀ
H
.
Window L Register 2
Address 021F16
Vertical Position Register 1i
b7 b6 b5b4 b3 b2b1 b0
Vertical position register 1i (VP1i) (i = 1 to 16) [Addresses 022016 to 022F16
]
B
0
to
7
Name
Functions
After reset
R
W
Vertical display start positions
(low-order 8 bits)
Indeterminate R W
Control bits of vertical
display start positions
(VP1i0 to VP1i7)
(See note 1)
TH ✕
(setting value of low-order 2 bits of VP2i
+ setting value of low-order 4 bits of VP1i
+ setting value of low-order 4 bits of VP1i
✕
✕
✕
162
161
160)
Notes 1: Set values except “0016” “0116” to VP1i when VP2i is “00 16.”
2: T is cycle of HSYNC
H
.
Vertical Position Register 1i
Addresses 022016 to 022B16
Vertical Position Register 2i
b7 b6 b5b4 b3 b2b1 b0
Vertical position register 2i (VP2i) (i = 1 to 16) [Addresses 023016 to 023F16]
B
Name
Functions
After reset
R
W
0, 1
Vertical display start positions
(high-order 2 bits)
TH ✕
(setting value of low-order 2 bits of VP2i
+ setting value of low-order 4 bits of VP1i
+ setting value of low-order 4 bits of VP1i
Indeterminate R W
Control bits of vertical
display start positions
(VP1i0, VP1i1)
(See note 1)
✕
✕
✕
162
161
160)
2
to
7
Indeterminate R —
Nothing is assigned. These bits are write disable bits.
When these bits are read out, the values are indeterminate.
Notes 1: Set values except “0016” “0116” to VP1i when VP2i is “00 16.”
2: TH is cycle of HSYNC.
Vertical Position Register 2i
Addresses 023016 to 023B16
144
RENESAS [ RENESAS TECHNOLOGY CORP ]
