MITSUBISHI MICROCOMPUTERS
M37274EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
ELECTRIC CHARACTERISTICS (VCC = 5 V ± 10 %, VSS = 0 V, f(XIN) = 8 MHz, Ta = –10 °C to 70 °C, unless otherwise noted)
Limits
Parameter
Power source current
Test conditions
Unit
Symbol
Min.
Typ.
15
Max.
30
ICC
System operation
V
CC = 5.5 V, CRT OFF
f(XIN) = 8 MHz Data slicer OFF
mA
CRT ON
Data slicer ON
30
60
50
VCC = 5.5 V, f(XIN) = 0,
f(XCIN) = 32kHz,
200
OSD OFF, Data slicer OFF,
Low-power dissipation
mode set (CM5 = “0”,
CM6 = “1”)
µA
mA
µA
VCC = 5.5 V, f(XIN) = 8 MHz
Wait mode
Stop mode
2
4
VCC = 5.5 V, f(XIN) = 0,
f(XCIN) = 32kHz,
Low-power dissipation
mode set (CM5 = “0”,
CM6 = “1”)
25
100
VCC = 5.5 V, f(XIN) = 0,
f(XCIN) = 0
1
10
VOH
VOL
HIGH output voltage P52–P55, P10, P03, P15–P17, VCC = 4.5 V
2.4
V
V
P20–P27, P30, P31
IOH = –0.5 mA
LOW output voltage P52–P55, P10, SOUT, SCLK,
P00–P07, P15–P17, P20–P27
VCC = 4.5 V
IOL = 0.5 mA
0.4
3.0
LOW output voltage P30, P31
VCC = 4.5 V
IOL = 10.0 mA
0.4
0.6
LOW output voltage P11–P14
VCC = 4.5 V
IOL = 3 mA
IOL = 6 mA
______
VT+–VT–
IIZH
Hysteresis (Note 6) RESET, HSYNC, VSYNC, INT1,
0.5
1.3
VCC = 5.0 V
INT2, INT3, TIM2, TIM3, SIN, SCLK,
V
SCL1, SCL2, SDA1, SDA2
______
HIGH input leak current RESET, P0
3
, P1
, P4 –P4
, HSYNC, VSYNC
0
–P1
7
, P2
0
–P2
7
,
VCC = 5.5 V
VI = 5.5 V
5
10
5
P3
P7
0
, P3
–P7
1
0
6, P6
3
, P6
4,
µA
0
2
HIGH input leak current
LOW input leak current
P00–P02, P04–P07
VCC = 5.5 V
VI = 12 V
______
VCC = 5.5 V
VI = 0 V
RESET, P0
0
–P0
1
7
, P1
, P4 –P4
, HSYNC, VSYNC
0
–P1
6
7
, P2
0
–
IIZL
µA
P2
P6
7
, P3
, P7
0
, P3
–P7
0
, P6
3,
4
0
2
2
I C-BUS·BUS switch connection resistor
(between SCL1 and SCL2, SDA1 and SDA2)
VCC = 4.5 V
RBS
130
Ω
Notes 1: The total current that flows out of the IC must be 20 or less.
2: The total input current to IC (IOL1 + IOL2 + IOL3) must be 20 mA or less.
3: The total average input current for ports P30, P31 to IC must be 10 mA or less.
4: Connect 0.1 µF or more capacitor externally between the power source pins VCC–VSS and AVCC–VSS so as to reduce power source
noise.
Also connect 0.1 µF or more capacitor externally between the pins VCC–CNVSS.
5: Use a quartz-crystal oscillator or a ceramic resonator for the CPU oscillation circuit. When using the data slicer, use 8 MHz.
6: P16, P41–P44 have the hysteresis when these pins are used as interrupt input pins or timer input pins. P11–P14 have the hysteresis
2
when these pins are used as multi-master I C-BUS interface ports. P17 and P46 have the hysteresis when these pins are used as
serial I/O pins.
7: When using the sub-clock, set fCLK < fCPU/3.
8: Pin names in each parameter is described as below.
(1) Dedicated pins: dedicated pin names.
(2) Duble-/triple-function ports
• When the same limits: I/O port name.
• When the limits of functins except ports are different from I/O port limits: function pin name.
109
RENESAS [ RENESAS TECHNOLOGY CORP ]
