MITSUBISHI MICROCOMPUTERS
M37274EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
RESET CIRCUIT
When the oscillation of a quartz-crystal oscillator or a ceramic reso-
Poweron
nator is stable and the power source voltage is 5 V ± 10 %, hold the
______
RESET pin at LOW for 2 µs or more, then return is to HIGH. Then, as
shown in Figure 106, reset is released and the program starts form
the address formed by using the content of address FFFF16 as the
high-order address and the content of the address FFFE16 as the
low-order address. The internal state of microcomputer at reset are
shown in Figures 5 to 9.
4.5 V
0.9 V
Power source voltage 0 V
Reset input voltage 0 V
An example of the reset circuit is shown in Figure 105.
The reset input voltage must be kept 0.9 V or less until the power
source voltage surpasses 4.5 V.
27
Vcc
1
30
5
4
RESET
M51953AL
0.1 µF
3
26
Vss
M37274EFSP
Fig. 105. Example of Reset Circuit
XIN
φ
RESET
Internal RESET
SYNC
ADH,
ADL
01, S-1
01, S-2
01, S
FFFE FFFF
Address
Data
?
?
Reset address from the vector table
AD
L
ADH
?
?
?
?
?
Notes 1 : f(XIN) and f(φ) are in the relation : f(XIN) = 2·f (φ).
32768 count of XIN
clock cycle (Note 3)
A question mark (?) indicates an undefined state that
depends on the previous state.
2 :
3 :
Immediately after a reset, timer 3 and timer 4 are
connected by hardware. At this time, “FF16” is set
in timer 3 and “0716” is set to timer 4. Timer 3 counts down
with f(XIN)/16, and reset state is released by the timer 4
overflow signal.
Fig. 106. Reset Sequence
102
RENESAS [ RENESAS TECHNOLOGY CORP ]
