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M37274EFSP 参数 Datasheet PDF下载

M37274EFSP图片预览
型号: M37274EFSP
PDF下载: 下载PDF文件 查看货源
内容描述: 单片8位CMOS单片机结合闭合字幕解码器和屏幕显示控制器 [SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER]
分类和应用: 解码器显示控制器微控制器和处理器外围集成电路光电二极管瞄准线计算机可编程只读存储器时钟
文件页数/大小: 148 页 / 1926 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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MITSUBISHI MICROCOMPUTERS  
M37274EFSP  
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER  
and ON-SCREEN DISPLAY CONTROLLER  
ROM CORRECTION FUNCTION  
This can correct program data in ROM. Up to 2 addresses (2 blocks)  
can be corrected, a program for correction is stored in the ROM cor-  
rection memory in RAM. The ROM memory for correction is 32 bytes  
2 blocks.  
ROM correction address 1 (high-order) 024216  
ROM correction address 1 (low-order) 024316  
ROM correction address 2 (high-order) 024416  
Block 1 : addresses 02C016 to 02DF16  
Block 2 : addresses 02E016 to 02FF16  
Set the address of the ROM data to be corrected into the ROM cor-  
rection address register. When the value of the counter matches the  
ROM data address in the ROM correction address, the main pro-  
gram branches to the correction program stored in the ROM memory  
for correction. To return from the correction program to the main pro-  
gram, the op code and operand of the JMP instruction (total of 3  
bytes) are necessary at the end of the correction program. When the  
blocks 1 and 2 are used in series, the above instruction is not needed  
at the end of the block 1.  
ROM correction address 2 (low-order)  
024516  
Fig. 103. ROM Correction Address Registers  
The ROM correction function is controlled by the ROM correction  
enable register.  
Notes 1 : Specify the first address (op code address) of each  
instruction as the ROM correction address.  
2 : Use the JMP instruction (total of 3 bytes) to return from  
the main program to the correction program.  
3 : Do not set the same ROM correction address to blocks  
1 and 2.  
ROM Correction Enable Register  
b7 b6 b5 b4 b3 b2 b1 b0  
ROM correction enable register (RCR) [Address 024616]  
0
0
B
Name  
Functions  
After reset R W  
0
Block 1 enable bit (RC0)  
0: Disabled  
1: Enabled  
0
R W  
1
Block 2 enable bit (RC1)  
Fix these bits to “0.”  
0: Disabled  
1: Enabled  
0
R W  
2, 3  
0
R W  
Nothing is assigned. These bits are write disable bits. When  
these bits are read out, the values are “0.”  
4
to  
7
0
R —  
Fig. 104. ROM Correction Enable Register  
101  
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