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M34283G2-XXXGP 参数 Datasheet PDF下载

M34283G2-XXXGP图片预览
型号: M34283G2-XXXGP
PDF下载: 下载PDF文件 查看货源
内容描述: 单片4位微机的CMOS [SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER]
分类和应用: 计算机
文件页数/大小: 64 页 / 472 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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4283 Group  
Skip condition  
Detailed description  
Continuous  
description  
Loads the value n in the immediate field to register A.  
When the LA instructions are continuously coded and executed, only the first LA instruction is executed  
and other LA instructions coded continuously are skipped.  
Transfers bits 7 to 4 to register B and bits 3 to 0 to register A when URS flag is cleared to “0.” These bits  
7 to 0 are the ROM pattern in address (DR2 DR1 DR0 A3 A2 A1 A0) specified by registers A and D in  
page p.  
0/1 Transfers bit 8 of ROM pattern is transferred to flag CY when URS flag is set to “1” (after the URSC  
instruction is executed).  
(One of stack is used when the TABP p instruction is executed.)  
Adds the contents of M(DP) to register A. Stores the result in register A. The contents of carry flag CY  
remains unchanged.  
0/1 Adds the contents of M(DP) and carry flag CY to register A. Stores the result in register A and carry flag  
CY.  
Overflow = 0  
Adds the value n in the immediate field to register A.  
The contents of carry flag CY remains unchanged.  
Skips the next instruction when there is no overflow as the result of operation.  
1
0
Sets (1) to carry flag CY.  
Clears (0) to carry flag CY.  
(CY) = 0  
Skips the next instruction when the contents of carry flag CY is “0.”  
Stores the one‘s complement for register A‘s contents in register A.  
0/1 Rotates 1 bit of the contents of register A including the contents of carry flag CY to the right.  
Executes the logic operation selected by logic operation selection register LO between the contents of  
register A and register E, and stores the result in register A.  
Rev.1.01 Mar 20, 2006 page 49 of 62  
REJ03B0109-0101  
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